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| Presentation | 2022-06-08 09:20 Investigation of methods to accelerate inference processing by deep learning Seiya Iwamoto, Chikako Nakanishi (OIT)  RECONF2022-13 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | AI technologies such as deep learning are generally computationally intensive and have very high performance requirements to run on CPUs. We propose an inexpensive and low-power implementation method using SoC FPGAs to realize "edge AI" that performs inference processing at edge terminals. Using EfficientNet as an example, we analyze the computational structure of EfficientNet and create a circuit that accelerates the processing that takes up most of the processing time. By measuring the processing time of the created system, we analyzed the processing of each segment of the circuit and verified where the acceleration was achieved. We then studied methods for further acceleration, and by implementing and re-measuring the circuits, we investigated the means necessary to reduce the processing time and considered effective reduction methods. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | deep learning / inference processing / SoC FPGA / EfficientNet / shared memory / Cache Management / / | |
| Reference Info. | IEICE Tech. Rep., vol. 122, no. 60, RECONF2022-13, pp. 52-56, June 2022. | |
| Paper # | RECONF2022-13 | |
| Date of Issue | 2022-05-31 (RECONF) | |
| ISSN | Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Notes on Review | This article is a technical report without peer review, and its polished version will be published elsewhere. | |
| Download PDF | RECONF2022-13 |
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| Conference Information | |
| Committee | RECONF |
| Conference Date | 2022-06-07 - 2022-06-08 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | CCS, Univ. of Tsukuba |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable system, etc. |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2022-06-RECONF |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Investigation of methods to accelerate inference processing by deep learning |
| Sub Title (in English) | |
| Keyword(1) | deep learning |
| Keyword(2) | inference processing |
| Keyword(3) | SoC FPGA |
| Keyword(4) | EfficientNet |
| Keyword(5) | shared memory |
| Keyword(6) | Cache Management |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Seiya Iwamoto |
| 1st Author's Affiliation | Osaka Institute of Technology (OIT) |
| 2nd Author's Name | Chikako Nakanishi |
| 2nd Author's Affiliation | Osaka Institute of Technology (OIT) |
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| Speaker | Author-1 |
| Date Time | 2022-06-08 09:20:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | RECONF2022-13 |
| Volume (vol) | vol.122 |
| Number (no) | no.60 |
| Page | pp.52-56 |
| #Pages | 5 |
| Date of Issue | 2022-05-31 (RECONF) |
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