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Paper Abstract and Keywords
Presentation 2023-01-27 16:10
Common-Mode Current Reduction on Output Cable of Inverters with Impedance Balance Method
Taiki Nishimoto, Masahiro Yamaoka, Yasuhiro Arai (Panasonic Industry) EMCJ2022-90
Abstract (in Japanese) (See Japanese page) 
(in English) This report presents a novel inverter circuit structure for suppressing common-mode (CM) current on output cable. Adding impedance elements between the output trace of each phase and the bus traces, CM voltage propagation from a certain leg to own-phase output terminal can be described with a bridge-shaped equivalent circuit. Furthermore, connecting output traces mutually with additional impedance elements, CM voltage propagation from a certain leg to other-phase output terminals can also be described with another bridge circuit. Applying impedance balance method, we can suppress noise propagation from each leg to all output terminals simultaneously when both bridge circuits are balanced. We derived the balance condition for the single-phase inverter, and verified that CM voltage transfer ratio can be suppressed. Finally, it was confirmed that CM current decreased by over 20 dB using circuit simulation of the three-phase inverter.
Keyword (in Japanese) (See Japanese page) 
(in English) Inverter / Impedance Balance / EMC / Common-Mode Noise / / / /  
Reference Info. IEICE Tech. Rep., vol. 122, no. 372, EMCJ2022-90, pp. 99-104, Jan. 2023.
Paper # EMCJ2022-90 
Date of Issue 2023-01-20 (EMCJ) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee EMCJ  
Conference Date 2023-01-27 - 2023-01-27 
Place (in Japanese) (See Japanese page) 
Place (in English) WASHU BLUE RESORT 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To EMCJ 
Conference Code 2023-01-EMCJ 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Common-Mode Current Reduction on Output Cable of Inverters with Impedance Balance Method 
Sub Title (in English)  
Keyword(1) Inverter  
Keyword(2) Impedance Balance  
Keyword(3) EMC  
Keyword(4) Common-Mode Noise  
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1st Author's Name Taiki Nishimoto  
1st Author's Affiliation Panasonic Industry Corporation (Panasonic Industry)
2nd Author's Name Masahiro Yamaoka  
2nd Author's Affiliation Panasonic Industry Corporation (Panasonic Industry)
3rd Author's Name Yasuhiro Arai  
3rd Author's Affiliation Panasonic Industry Corporation (Panasonic Industry)
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Speaker Author-1 
Date Time 2023-01-27 16:10:00 
Presentation Time 20 minutes 
Registration for EMCJ 
Paper # EMCJ2022-90 
Volume (vol) vol.122 
Number (no) no.372 
Page pp.99-104 
#Pages
Date of Issue 2023-01-20 (EMCJ) 


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