Paper Abstract and Keywords |
Presentation |
2023-02-28 16:40
Effective Switching Probability Calculation to Locate Hotspots in Logic Circuit Taiki Utsunomiya, Kohei Miyase, Ryu Hoshino (Kyutech), Shyue-Kung Lu (NTUST), Xiaoqing Wen, Seiji Kajihara (Kyutech) DC2022-92 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
High power consumption in LSI testing may cause excessive IR-drop. When IR-drop becomes excessive, it causes excessive delay, resulting in test malfunction. Excessive IR-drop does not occur in the entire area of circuit, but in certain areas where a large number of switching activities occur (such areas are called hotspots in this work). In order to avoid test malfunction, it is important to develop a method to reduce or control IR-drop in the specific areas. Locating areas where excessive IR-drop occur is a necessary technique to reduce or control IR-drop effectively and efficiently. In this work, we propose a method to locate hotspots in a logic circuit by switching probability calculation. Experimental results for IWLS2005 OpenCores circuits demonstrate the proposed method can locate hotspots by comparing the results of power consumption which show hotspots in various areas depending on a test pattern. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
At-speed testing / test power / / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 122, no. 393, DC2022-92, pp. 56-61, Feb. 2023. |
Paper # |
DC2022-92 |
Date of Issue |
2023-02-21 (DC) |
ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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DC2022-92 |
Conference Information |
Committee |
DC |
Conference Date |
2023-02-28 - 2023-02-28 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kikai-Shinko-Kaikan Bldg |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
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Paper Information |
Registration To |
DC |
Conference Code |
2023-02-DC |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Effective Switching Probability Calculation to Locate Hotspots in Logic Circuit |
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At-speed testing |
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test power |
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1st Author's Name |
Taiki Utsunomiya |
1st Author's Affiliation |
Kyushu Institute of Technology (Kyutech) |
2nd Author's Name |
Kohei Miyase |
2nd Author's Affiliation |
Kyushu Institute of Technology (Kyutech) |
3rd Author's Name |
Ryu Hoshino |
3rd Author's Affiliation |
Kyushu Institute of Technology (Kyutech) |
4th Author's Name |
Shyue-Kung Lu |
4th Author's Affiliation |
National Taiwan University of Science and Technology (NTUST) |
5th Author's Name |
Xiaoqing Wen |
5th Author's Affiliation |
Kyushu Institute of Technology (Kyutech) |
6th Author's Name |
Seiji Kajihara |
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Kyushu Institute of Technology (Kyutech) |
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Speaker |
Author-1 |
Date Time |
2023-02-28 16:40:00 |
Presentation Time |
25 minutes |
Registration for |
DC |
Paper # |
DC2022-92 |
Volume (vol) |
vol.122 |
Number (no) |
no.393 |
Page |
pp.56-61 |
#Pages |
6 |
Date of Issue |
2023-02-21 (DC) |
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