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Paper Abstract and Keywords
Presentation 2023-11-16 14:10
Implementation of Neural Networks in Memory-based Reconfigurable Processor
Kenta Sasagawa, Tatsuya Nishikawa, Xihong Zhou, Senling Wang, Hiroshi Kai, Hiroshi Takahashi (Ehime Univ.) VLD2023-51 ICD2023-59 DC2023-58 RECONF2023-54
Abstract (in Japanese) (See Japanese page) 
(in English) With the development of recent IoT technologies，there is a demand to implement intelligent processing in devices where data is generated at the edge of the network，and reconfigurable devices are drawing attention. MRP，one of the reconfigurable devices，is a memory-centric reconfigurable device. Compared to other reconfigurable devices such as FPGA，it excels in processing speed and cost-effectiveness. While it is possible to implement Neural Networks (NN)，which are the core of intelligent processing，the method for implementing a highly reliable NN is not yet established due to its unique structure. Therefore，in this study，we proposed an NN structure adapted to the MRP structure，called MNN，and evaluated its accuracy.
Keywords: MRP，Neuron，MNN，Quantization
Keyword (in Japanese) (See Japanese page) 
(in English) MRP / Neuron / MNN / Quantization / / / /  
Reference Info. IEICE Tech. Rep., vol. 123, no. 258, VLD2023-51, pp. 112-116, Nov. 2023.
Paper # VLD2023-51 
Date of Issue 2023-11-08 (VLD, ICD, DC, RECONF) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2023-51 ICD2023-59 DC2023-58 RECONF2023-54

Conference Information
Committee VLD DC RECONF ICD IPSJ-SLDM  
Conference Date 2023-11-15 - 2023-11-17 
Place (in Japanese) (See Japanese page) 
Place (in English) Civic Auditorium Sears Home Yume Hall 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2023 -New Field of VLSI Design- 
Paper Information
Registration To VLD 
Conference Code 2023-11-VLD-DC-RECONF-ICD-SLDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Implementation of Neural Networks in Memory-based Reconfigurable Processor 
Sub Title (in English)  
Keyword(1) MRP  
Keyword(2) Neuron  
Keyword(3) MNN  
Keyword(4) Quantization  
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1st Author's Name Kenta Sasagawa  
1st Author's Affiliation Ehime University (Ehime Univ.)
2nd Author's Name Tatsuya Nishikawa  
2nd Author's Affiliation Ehime University (Ehime Univ.)
3rd Author's Name Xihong Zhou  
3rd Author's Affiliation Ehime University (Ehime Univ.)
4th Author's Name Senling Wang  
4th Author's Affiliation Ehime University (Ehime Univ.)
5th Author's Name Hiroshi Kai  
5th Author's Affiliation Ehime University (Ehime Univ.)
6th Author's Name Hiroshi Takahashi  
6th Author's Affiliation Ehime University (Ehime Univ.)
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Speaker Author-1 
Date Time 2023-11-16 14:10:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2023-51, ICD2023-59, DC2023-58, RECONF2023-54 
Volume (vol) vol.123 
Number (no) no.258(VLD), no.259(ICD), no.260(DC), no.261(RECONF) 
Page pp.112-116 
#Pages 5 
Date of Issue 2023-11-08 (VLD, ICD, DC, RECONF) 

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