This paper proposes a VCO topology in which the tail-current is adaptively modulated for enhancing the current efficiency. The adaptive modulation also ensures highly robust start-up over a wide range of PVT variation. The analysis also reveals that the tail-current modulation technique is also capable of alleviating the AM-PM conversion thereby extending the theoretical limit of the minimum achievable phase noise. The proposed VCO is implemented in a 0.18-? CMOS process. The measured phase noise is -119.3dBc/Hz at 1MHz offset with a power dissipation of 6.8mW at 4.6GHz.
(英)
This paper proposes a VCO topology in which the tail-current is adaptively modulated for enhancing the current efficiency. The adaptive modulation also ensures highly robust start-up over a wide range of PVT variation. The analysis also reveals that the tail-current modulation technique is also capable of alleviating the AM-PM conversion thereby extending the theoretical limit of the minimum achievable phase noise. The proposed VCO is implemented in a 0.18-? CMOS process. The measured phase noise is -119.3dBc/Hz at 1MHz offset with a power dissipation of 6.8mW at 4.6GHz.