Wed, Mar 4 AM 09:30 - 10:20 |
(1) |
09:30-09:55 |
A Method to Decide Row-Shift Decomposability of Index Generation Functions |
Tsunesada Kyoichiro, Shinobu Nagayama, Masato Inagi, Shin'ichi Wakabayashi (HCU) |
(2) |
09:55-10:20 |
A Pin-Pair Routing Method for Length Difference Reduction in Set-Pair Routing |
Kunihiko Wada, Shimpei Sato, Atsushi Takahashi (TokyoTech) |
|
10:20-10:30 |
Break ( 10 min. ) |
Wed, Mar 4 AM 10:30 - 11:45 |
(3) |
10:30-10:55 |
An EVBDD-based Design Verification for Elementary Function Generators |
Hiroto Fukuhara, Shinobu Nagayama, Masato Inagi, Shin'ichi Wakabayashi (HCU) |
(4) |
10:55-11:20 |
An Automatic Method to Generalize Matrix-Vector Multiplication with Multiple Processors Considering the Efficiency of the Communications |
Akihiro Goda, Masahiro Fujita (UT) |
(5) |
11:20-11:45 |
A Study of Arithmetic-Oriented Application Implementations for Via-Switch FPGA |
Takashi Imagawa (Ritsumeikan Univ.), Yu Jaehoon (Tokyo Tech), Masanori Hashimoto (Osaka Univ.), Hiroyuki Ochi (Ritsumeikan Univ.) |
|
11:45-13:00 |
Lunch Break ( 75 min. ) |
Wed, Mar 4 PM 13:00 - 14:15 |
(6) |
13:00-13:25 |
MTJ-based Nonvolatile Flip-Flop Circuit Using Dual Power Supplies for Low-voltage Operation |
Sosuke Akiba, Kimiyoshi Usami (SIT) |
(7) |
13:25-13:50 |
A Study of Dynamic Power Optimization by Latch Insertion for Asynchronous RTL Models |
Shogo Semba, Hiroshi Saito (UoA) |
(8) |
13:50-14:15 |
Standard Cell Library of Stack Structured Cells to Reduce LSI Maximum Power Consumption |
Yuki Imai (Saitama Univ.), Shinichi Nishizawa (Fukuoka Univ.), Kazuhito Ito (Saitama Univ.) |
|
14:15-14:30 |
Break ( 15 min. ) |
Wed, Mar 4 PM 14:30 - 15:45 |
(9) |
14:30-14:55 |
Estimation method of process variation using an IDDQ test and retention characteristics of flip-flop |
Shinichi Nishizawa (Fukuoka Univ.), Kazuhito (Saitama Univ.) |
(10) |
14:55-15:20 |
Gate Sizing for Programmable Delay Elements on Post-Silicon Delay Tuning |
Kota Muroi, Yukihide Kohira (UoA) |
(11) |
15:20-15:45 |
Thermal-Aware Clock Skew Scheduling Based on Two-Graph Approach |
Mineo Kaneko (JAIST) |
|
15:45-16:00 |
Break ( 15 min. ) |
Wed, Mar 4 PM 16:00 - 17:40 |
(12) |
16:00-16:25 |
Pixel-based Mask Optimization with Lagrangian Relaxation and Boundary Flipping |
Rina Azuma, Yukihide Kohira (Univ. of Aizu), Tomomi Matsui, Atsushi Takahashi (Tokyo Tech), Chikaaki Kodama (KIOXIA) |
(13) |
16:25-16:50 |
Machine Learning Based Lithography Hotspot Detection Method and Evaluation |
Hidekazu Takahashi, Shimpei Sato, Atsushi Takahashi (Tokyo Tech) |
(14) |
16:50-17:15 |
Additional Training Data Generation for Lithography Hotspot Detection by Modifying Existing Training Data |
Gaku Kataoka, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi (Hiroshima City Univ.) |
(15) |
17:15-17:40 |
A Preliminary Study of Spectrum-based Feature Vectors for Lithography Hotspot Detection |
Masato Inagi, Gaku Kataoka, Shinobu Nagayama, Shin'ichi Wakabayashi (Hiroshima City Univ.) |
Thu, Mar 5 AM 09:30 - 10:20 |
(16) |
09:30-09:55 |
Monte Carlo Tree Search for routing of delivery drone |
Kota Iwasaki, Yasuhiro Takashima (Univ. of Kitakyushu) |
(17) |
09:55-10:20 |
HCP: History-based Congestion Prediction Algorithm for Network-on-Chip |
Zhenyu Hu, Michael Conrad Meyer (Waseda Univ.), Xin Jiang (NITKIT), Takahiro Watanabe (Waseda Univ.) |
|
10:20-10:30 |
Break ( 10 min. ) |
Thu, Mar 5 AM 10:30 - 11:45 |
(18) |
10:30-10:55 |
Motor Current Signature Analysis Based On-Line Fault Detection of DC Motor |
Naoki Osako (Kwansei Gakuin Univ.), Hiroyuki Kanbara (ASTEM), Nagisa Ishiura (Kwansei Gakuin Univ.) |
(19) |
10:55-11:20 |
Fault-tolerant Design for Memristor Neural Network Using Checksum and Online Testing |
Mamoru Ishizaka, Michihiro Shintani, Michiko Inoue (NAIST) |
(20) |
11:20-11:45 |
stochasitc fast estimation of timing error induced circuit lifetime distribution |
Hazuki Tomiyama, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.) |
|
11:45-13:00 |
Lunch Break ( 75 min. ) |
Thu, Mar 5 PM 13:00 - 14:15 |
(21) |
13:00-13:25 |
Hardware Control from Erlang Programs on Programmable SoC |
Hidekazu Wakabayashi (Kwansei Gakuin Univ.), Nagisa Ishiura (Kwnsei Gakuin Univ.) |
(22) |
13:25-13:50 |
A Study Toward Binary Code Generation Using Neural Programmer-Interpreters |
Masahiko Tsuyama, Ryusuke Miyamoto (Meiji Univ.) |
(23) |
13:50-14:15 |
A Study of A H/W-S/W Co-design Method to Make Effective Utilization of System Resources |
Fumitoshi Karube, Shunsuke Tatsumi, Naoya Okada, Ryo Yamamoto, Yoshihiro Ogawa (MELCO), Abraham Goldsmith, Rien Quirynen (MERL) |
|
14:15-14:30 |
Break ( 15 min. ) |
Thu, Mar 5 PM 14:30 - 15:45 |
(24) |
14:30-14:55 |
[Memorial Lecture]
Small-Area and Low-Power FPGA-Based Multipliers using Approximate Elementary Modules |
Yi Guo, Heming Sun, Shinji Kimura (Waseda Univ.) |
(25) |
14:55-15:20 |
[Memorial Lecture]
A Tuning-Free Hardware Reservoir Based on MOSFET Crossbar Array for Practical Echo State Network Implementation |
Yuki Kume, Song Bian, Takashi Sato (Kyoto Univ.) |
(26) |
15:20-15:45 |
[Memorial Lecture]
Workload-aware Data-eviction Self-adjusting System of Multi-SCM Storage to Resolve Trade-off between SCM Data-retention Error and Storage System Performance |
Reika Kinoshita, Chihiro Matsui, Atsuya Suzuki, Shouhei Fukuyama, Ken Takeuchi (Chuo Univ.) |
|
15:45-16:00 |
Break ( 15 min. ) |
Thu, Mar 5 PM 16:00 - 17:15 |
(27) |
16:00-16:25 |
Approximate Floating Point Multiplier based on Shifting Addition Using Carry Signal from Second-Highest-Bit |
Jie Li, Yi Guo, Shinji Kimura (Waseda Univ.) |
(28) |
16:25-16:50 |
Image edge detection using Latest Results based Approximate Computing |
Hajime Ochi, Kimiyoshi Usami (SIT) |
(29) |
16:50-17:15 |
NA |
Masashi Tawada, Nozomu Togawa (Waseda Univ.) |
Fri, Mar 6 AM 09:30 - 10:20 |
(30) |
09:30-09:55 |
N/A |
Yosuke Mukasa, Tomoya Wakaizumi, Shu Tanaka, Nozomu Togawa (Waseda Univ.) |
(31) |
09:55-10:20 |
NA |
Sho Kanamaru, Kotaro Terada, Kazushi Kawamura, Shu Tanaka (Waseda Univ.), Yoshinori Tomita (Fujitsu Laboratories, Ltd), Nozomu Togawa (Waseda Univ.) |
|
10:20-10:30 |
Break ( 10 min. ) |
Fri, Mar 6 AM 10:30 - 11:45 |
(32) |
10:30-10:55 |
A Consideration on Efficient Anomaly Detection Based on Isolation Forest |
Tsubasa Ikeda, Shinobu Nagayama, Masato Inagi, Shin'ichi Wakabayashi (HCU) |
(33) |
10:55-11:20 |
|
|
(34) |
11:20-11:45 |
Development of Traffic Monitoring System for Network Virtualization with Hardware Accelerator |
Namiko Ikeda, Yuta Ukon, Shouko Ohteru, Shuhei Yoshida, Koyo Nitta (NTT) |
|
11:45-13:00 |
Lunch Break ( 75 min. ) |
Fri, Mar 6 PM 13:00 - 14:15 |
(35) |
13:00-13:25 |
Fundamental Study on Fault Analysis with Non-Uniform Faulty Values Caused at Fault Injection into Sequential Circuit |
Takumi Okamoto, Daisuke Fujimoto (NAIST), Kazuo Sakiyama, Li Yang (UEC), Yu-ichi Hayashi (NAIST) |
(36) |
13:25-13:50 |
Fundamental Study on Side-Channel Attacks on Radio Communication ICs |
Ryuuya Ichinose, Sakamoto Junichi, Tsutomu Matsumoto (Yokohama National Univ.) |
(37) |
13:50-14:15 |
Design Space Search for Faster Fp256 Elliptic Curve Cryptography |
Kento Ikeda (Tokyo Univ.), Makoto Ikeda (d.lab) |
|
14:15-14:30 |
Break ( 15 min. ) |
Fri, Mar 6 PM 14:30 - 15:45 |
(38) |
14:30-14:55 |
A Test Generation Method for Resistive Open Faults Using Partial MAX-SAT solver |
Hiroshi Yamazaki, Yuta Ishiyama, Tatsuma Matsuta, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) |
(39) |
14:55-15:20 |
On evaluation of logic locking method based on Affine transformation |
Yusuke Matsunaga (Kyushu Univ.) |
(40) |
15:20-15:45 |
NA |
Tomotaka Inoue, Kento Hasegawa, Nozomu Togawa (Waseda Univ.) |
|
15:45-16:00 |
Break ( 15 min. ) |
Fri, Mar 6 PM 16:00 - 17:40 |
(41) |
16:00-16:25 |
A Study on Acceleration of Convolution using Bit-serial Dot Product Units with Zero-bit Skipping |
Sora Isobe, Yoichi Tomioka (UoA) |
(42) |
16:25-16:50 |
A Study of FPGA Architectures for Deep Neural Network in Control devices |
Ryo Yamamoto, Hidetomo Iwagawa, Yoshihiro Ogawa (Mitsubishi Electric) |
(43) |
16:50-17:15 |
Performance Evaluation of Echo State Networks with Hardware Reservoirs |
Yuki Kume, Song Bian, Kenta Nagura, Takashi Sato (Kyoto Univ.) |
(44) |
17:15-17:40 |
Circuit Architecture Exploration for Optical Neural Network based on Integrated Nanophotonics |
Naoki Hattori, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.), Jun Shiomi (Kyoto Univ.), Akihiko Shinya, Masaya Notomi (NTT) |
Sat, Mar 7 AM 10:30 - 11:45 |
(45) |
10:30-10:55 |
Causes of Entropy Loss on Non-IID PUFs and their Entropy Estimations (1) |
Mitsuru Shiozaki (Ritsumeikan Univ.), Yohei Hori (AIST), Shunsuke Okura, Masayoshi Shirahata, Takeshi Fujino (Ritsumeikan Univ.) |
(46) |
10:55-11:20 |
Causes of Entropy Loss on Non-IID PUFs and their Entropy Estimations (2) |
Mitsuru Shiozaki (Ritsumeikan Univ.), Yohei Hori (AIST), Shunsuke Okura, Masayoshi Shirahata, Takeshi Fujino (Ritsumeikan Univ.) |
(47) |
11:20-11:45 |
Color Alteration Attacks on Lane Detection Function |
Fumiki Miyazono, Naoki Yoshida, Tsutomu Matsumoto (Yokohama National Univ.) |
|
11:45-13:00 |
Lunch Break ( 75 min. ) |
Sat, Mar 7 PM 13:00 - 14:40 |
(48) |
13:00-13:25 |
An Inductive Impulse Self-Destructor in Sense-and-React Countermeasure Against Physical Attacks |
Sho Tada, Kohei Matsuda, Makoto Nagata (Kobe Univ.), Kazuo Sakiyama (UEC), Noriyuki Miura (Kobe Univ.) |
(49) |
13:25-13:50 |
Side-channel leakage evaluation of cryptographic module by IC chip level power supply noise simulation |
Kazuki Yasuda, Kazuki Monta, Akihiro Tsukioka, Noriyuki Miura, Makoto Nagata (Kobe Univ), Karthik Srinivasan, Shan Wan, Lagn Lin, Ying-Shiun Li, Norman Chang (ANSYS) |
(50) |
13:50-14:15 |
Light-Weight Design Methodology of Bulk Current Sensor Against Laser Fault Injection Attack on Cryptographic Processor |
Yuki Yamashita, Kohei Matsuda, Makoto Nagata, Noriyuki Miura (Kobe Univ.) |
(51) |
14:15-14:40 |
Algorithm and Architecture Design for Fully Homomorphic Encryption Hardware |
Shotaro Sugiyama, Makoto Ikeda (Tokyo Univ.) |