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09:00-09:10 |
( 10 min. ) |
Wed, Dec 1 AM 09:20 - 11:00 |
(1) VLD |
09:20-09:45 |
Soft Errors on Flip-flops Depending on Circuit and Layout Structures Estimated by TCAD Simulations |
Moeka Kotani, Ryuichi Nakajima (KIT), Kazuya Ioki (ROHM), Jun Furuta, Kazutoshi Kobayashi (KIT) |
(2) VLD |
09:45-10:10 |
Low quiescent current LDO with FVF based PSRR enhanced circuit for wearable EEG measurement devices |
Kenji Mii, Daisuke Kanemoto, Osamu Maida, Tetsuya Hirose (Osaka Univ.) |
(3) VLD |
10:10-10:35 |
MTJ-based non-volatile SRAM circuit with data-aware store control for energy saving |
Hisato Miyauchi, Kimiyoshi Usami (SIT) |
(4) VLD |
10:35-11:00 |
Energy saving in a multi-context coarse grained reconfigurable array with non-volatile flip-flops |
Aika Kamei, Takuya Kojima, Hideharu Amano (Keio Univ.), Daiki Yokoyama, Hisato Miyauchi, Kimiyoshi Usami (SIT), Keizo Hiraga, Kenta Suzuki (SSS) |
Wed, Dec 1 AM 09:20 - 11:00 |
(5) RECONF |
09:20-09:45 |
Block Sparse MLP-based Vision DNN Accelerators on Embedded FPGAs |
Akira Jinguji, Hiroki Nakahara (Tokyo Tech) |
(6) RECONF |
09:45-10:10 |
Sparsity-Gradient-Based Pruning and the Vitis-AI Implementation for Compacting Deep Learning Models |
Hengyi Li, Xuebin Yue, Lin Meng (Ritsumeikan Univ.) |
(7) RECONF |
10:10-10:35 |
A Multilayer Perceptron Training Accelerator using Systolic Array |
Takeshi Senoo, Akira Jinguji, Ryosuke Kuramochi, Hiroki Nakahara (Toyko Tech) |
(8) RECONF |
10:35-11:00 |
Basic evaluation of ReNA, a DNN accelerator using numerical representation posit |
Yasuhiro Nakahara, Yuta Masuda, Masato Kiyama, Motoki Amagasaki, Masahiro Iida (Kumamoto Univ.) |
Wed, Dec 1 AM 11:10 - 12:00 |
(9) DC |
11:10-11:35 |
Examination of model validation of interlocking connection using UPPAAL |
Takumi Hasegawa, Kohei Yabuki, Takahiro Shimura (Kyosan Mfg), Takeshi Mizuma (UTokyo) |
(10) DC |
11:35-12:00 |
Low power neural network by reducing the operating voltage of SRAM |
Keisuke Kozu, Kazuteru Namba (Chiba Univ.) |
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12:00-13:00 |
Lunch Break ( 60 min. ) |
Wed, Dec 1 AM 11:10 - 12:25 |
(11) |
11:10-11:35 |
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(12) |
11:35-12:00 |
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(13) |
12:00-12:25 |
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12:25-13:00 |
Lunch Break ( 35 min. ) |
Wed, Dec 1 PM 13:00 - 14:00 |
(14) |
13:00-14:00 |
Interface Between Cyber and Physical Space: Next-Generation Integrated System Direction
〇Noriyuki Miura (Osaka University) |
Wed, Dec 1 PM 14:20 - 16:00 |
(15) VLD |
14:20-14:45 |
Triple-Rail Stochastic Number and Its Applications |
Shoki Kawaminami, Shigeru Yamashita (Ritsumeikan Univ) |
(16) VLD |
14:45-15:10 |
Improving Accuracy of Addition for Stochastic Computing |
Ichilawa Katsuhiro, Shigeru Yamashita (Ritsumeikan Univ.) |
(17) VLD |
15:10-15:35 |
Error Recovery Method by Canceling Errors on DMFBs |
Yuji Wada, Shigeru Yamashita (Ritsumeikan Univ.) |
(18) VLD |
15:35-16:00 |
Determining Optimal Number of Layers for Network-Flow-based Sample Preparation |
Akira Ishida, Shigeru Yamashita (Ritsumeikan Univ.) |
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16:00-17:00 |
Break ( 60 min. ) |
Wed, Dec 1 PM 14:20 - 15:10 |
(19) ICD |
14:20-14:45 |
A Dual-mode SAR ADC to Detect Power Analysis Attack |
Takuya Wadatsumi, Takuji Miki, Makoto Nagata (Kobe Univ.) |
(20) ICD |
14:45-15:10 |
Diagnosis of Switching-Induced IR Drop by On-Chip Voltage Monitors |
Kazuki (Kobe Univ.), Leonidas Kataselas (Aristotle Univ.), Ferenc Fodor (IMEC), Alkis Hatzopoulos (Aristotle Univ.), Makoto Nagata (Kobe Univ.), Erik Jan Marinissen (IMEC) |
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15:10-17:00 |
Break ( 110 min. ) |
Wed, Dec 1 PM 17:00 - 19:00 |
(21) |
17:00-19:00 |
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Thu, Dec 2 AM 09:20 - 11:00 |
(22) VLD |
09:20-09:45 |
Development of Spiking Neural Network with Mem Capacitor
-- Reduction of recognition accuracy loss by improving the conversion method between synaptic strength and capacitance -- |
Atsushi Sawada, Reon Oshio, Mutsumi Kimura, Renyuan Zhang, Yasuhiko Nakashima (NAIST) |
(23) VLD |
09:45-10:10 |
Routing of Delivery Drones with Load- and Wind-Dependent Flight Speed |
Satoshi Ito, Keishi Akaiwa, Yusuke Funabashi, Hiroki Nishikawa, Xiangbo Kong (Ritsumeikan Univ.), Ittetsu Taniguchi (Osaka Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.) |
(24) VLD |
10:10-10:35 |
Design Method of ECG Measurement System Using Compression Sensing |
Yuki Matsumura, Daisuke Kanemoto, Osamu Maida, Tetsuya Hirose (Osaka Univ) |
(25) VLD |
10:35-11:00 |
Calculation method of correctly rounded exponential function on an FPGA |
Takuya Haraguchi, Naofumi Takagi (Kyoto Univ.) |
Thu, Dec 2 AM 09:20 - 11:00 |
(1) RECONF |
09:20-09:45 |
The Implementation of a Hybrid Router with Dynamic Communication Priority Changes on a Multi-FPGA System |
Tomoki Shimizu, Kohei Ito, Kensuke Iizuka, Kazuei Hironaka, Hideharu Amano (Keio Univ.) |
(2) RECONF |
09:45-10:10 |
Development of specific cache memory for Hybrid Graph Traversal Algorithm |
Yushi Haraguchi, Kazuya Tanigawa (HCU), Kentarou Sano (RIKEN), Tetsuo Hironaka (HCU) |
(3) RECONF |
10:10-10:35 |
A real-time exercise data recording system with an FPGA for fitness games |
Jun Takigawa, Tetsu Narumi (UEC) |
(4) RECONF |
10:35-11:00 |
Transition of R & D themes in Design Gaia
-- Analysis by text mining -- |
Tadashi Okabe (TIRI) |
Thu, Dec 2 AM 11:10 - 12:00 |
(5) |
11:10-11:35 |
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(6) |
11:35-12:00 |
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12:00-13:00 |
Lunch Break ( 60 min. ) |
Thu, Dec 2 AM 11:10 - 12:00 |
(7) RECONF |
11:10-11:35 |
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(8) RECONF |
11:35-12:00 |
Performance comparison of high-level synthesis tools using the gravitational many-body problem
-- On the difference between SDSoC and Vitis -- |
Akio Muramatsu, Tetsu Narumi (UEC) |
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12:00-13:00 |
Lunch Break ( 60 min. ) |
Thu, Dec 2 PM 13:00 - 14:00 |
(9) |
13:00-14:00 |
Introduction of Low Latency Video AI Solutions and their Utilization Cases
〇Takayuki Baba (IBEX Technology Co.,Ltd.) |
Thu, Dec 2 PM 14:20 - 16:00 |
(10) VLD |
14:20-14:45 |
Wafer-level Variation Modeling for Multi-site Testing of RF Circuits |
Riaz-ul-haque Mian (Shimane Univ.), Michihiro Shintani (NAIST) |
(11) VLD |
14:45-15:10 |
Extension of Channel Routing Method for Two-Layer Routing Problem including inside Terminals |
Kaito Ishigami, Kunihiro Fujiyoshi (TUAT) |
(12) VLD |
15:10-15:35 |
An Improved Method of Layout Pattern Classification with Creating Representative Clip |
Tomoya Masutani, Ishino Shuhei, Kunihiro Fujiyoshi (TUAT) |
(13) VLD |
15:35-16:00 |
Mask Optimization Method Using Simulated Quantum Annealing |
Yukihide Kohira, Haruki Nakayama, Naoki Nonaka (Univ. of Aizu), Tomomi Matsui, Atsushi Takahashi (Tokyo Tech), Chikaaki Kodama (KIOXIA Corporation) |
Thu, Dec 2 PM 14:20 - 15:35 |
(14) ICD |
14:20-14:45 |
Convolutional Neural Network using RISC-V |
Koki Oshiro (UEC) |
(15) ICD |
14:45-15:10 |
Operating-Condition-Aware Power-Gating-Switch Control Technique and Its Application to Nonvolatile Logic LSI |
Fangcen Zhong, Masanori Natsui, Takahiro Hanyu (Tohoku Univ.) |
(16) ICD |
15:10-15:35 |
A Sub uW and 14bit Resolution Temperature Sensor for IoT Using Thermistor-Defined TDC |
Nguyen Trong Hung (UEC), Van Trung Nguyen (LQDTU), Koichiro Ishibashi (UEC) |
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16:10-16:20 |
( 10 min. ) |