Conference Date |
Thu, Jun 8, 2023 14:00 - 17:50
Fri, Jun 9, 2023 09:15 - 16:00 |
Topics |
Reconfigurable system, etc. |
Conference Place |
Room A210, 2F, Education and Research Building, Eikokuji Campus, KOCHI UNIVERSITY OF TECHNOLOGY |
Address |
2-22 Eikokuji, Kochi City, Kochi 780-8515, JAPAN |
Transportation Guide |
https://www.kochi-tech.ac.jp/english/about/access/eikokuji.html |
Contact Person |
Prof. Yukio Mitsuyama, KOCHI UNIVERSITY OF TECHNOLOGY |
Notes on Review |
This article is a technical report without peer review, and its polished version will be published elsewhere. |
Registration Fee |
This workshop will be held as the IEICE workshop in fully electronic publishing. Registration fee will be necessary except the speakers and participants other than the participants to workshop(s) in non-electronic publishing. See the registration fee page. We request the registration fee or presentation fee to participants who will attend the workshop(s) on RECONF. |
Thu, Jun 8 PM Opening Address Chair: Kentaro Sano (RIKEN) 14:00 - 14:05 |
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14:00-14:05 |
Opening Address ( 5 min. ) |
Thu, Jun 8 PM Invited Chair: Kentaro Sano (RIKEN) 14:05 - 15:10 |
(1) |
14:05-14:55 |
[Invited Lecture]
Implementation and Evaluation of CNN Architectures for AI Engine |
Jun Ando (Xilinx) |
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14:55-15:10 |
Break ( 15 min. ) |
Thu, Jun 8 PM Architecture and system design Chair: Tomohiko Maruta (FUJIFILM Software Co., Ltd.) 15:10 - 16:35 |
(2) |
15:10-15:35 |
Study on mapping methods for Elastic CGRA |
Makoto Saito, Takuya Kojima, Hideki Takase, Hiroshi Nakamura (UT) |
(3) |
15:35-16:00 |
Investigation of "RegNet" acceleration method using SoC FPGA |
Natsuki Tajima, Chikako Nakanishi (OIT) |
(4) |
16:00-16:25 |
Parallelization of Prim's Algorithm Using FPGA and Its Performance Evaluation |
Noritsune O, Kenji Kanazawa, Moritoshi Yasunaga (Univ. of Tsukuba) |
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16:25-16:35 |
Break ( 10 min. ) |
Thu, Jun 8 PM Chair: Tomohiro Ueno (RIKEN) 16:35 - 17:50 |
(5) |
16:35-17:00 |
Investigation of a method to accelerate the operation of the object detection model "YOLOX" on edge devices |
Hiroki Yoshida, Chikako Nakanishi (OIT) |
(6) |
17:00-17:25 |
The object detection model "YOLOv7-tiny" Investigation of practical use in edge |
Shunsuke Funahashi, Chikako Nakanishi (OIT) |
(7) |
17:25-17:50 |
Efficiency and Effectiveness Analysis of a Scratchpad Memory on FPGA and GPU for Diffuse Radiation Transfer Simulation |
Kazuki Furukawa, Yoshiki Yamaguchi (Univ. of Tsukuba), Tomoya Yokono (NTT), Kohji Yoshikawa, Norihisa Fujita, Ryohei Kobayashi, Makito Abe, Taisuke Boku, Masayuki Umemura (Univ. of Tsukuba) |
Fri, Jun 9 AM Invited Chair: Yoshiki Yamaguchi (Univ. of Tsukuba / Kumanoto University) 09:15 - 10:15 |
(8) |
09:15-10:15 |
[Invited Talk]
RISC-V is inevitable |
Sam Rogan, Yoshito Kondo (SiFive) |
Fri, Jun 9 AM FPGAs in Physics Chair: Yuichiro Shibata (Nagasaki University) 10:15 - 11:30 |
(9) |
10:15-10:40 |
Real-Time Muon Beam Monitoring using FPGA and SoC Technologies
-- Through Field Trial Implementation for the COMET Phase-Alpha Experiment -- |
Yoon Jongkwan, Yoshiki Yamaguchi (筑波大), Yowichi Fujita, Yoshinori Fukao, Eitaro Hamada, Youichi Igarashi, Tetsuichi Kishishita, Masayoshi Shoji (KEK), Kazuki Ueno (Osaka Univ.) |
(10) |
10:40-11:05 |
Evaluation of low-voltage operations of an optically reconfigurable gate array VLSI |
Yuki Shimamura, Minoru Watanabe, Nobuya Watanabe (Okayama Univ.) |
(11) |
11:05-11:30 |
A Study of Quantum Computing-Oriented Large-Scale Memory Computation Directly Connected to NVM Storages: Parallel Implementation and Evaluation of Serial ATA Interface on an FPGA |
Ryohei Niwase, Hikaru Harasawa, Yoshiki Yamaguchi (Univ. of Tsukuba), Wei Kaijie, Hideharu Amano (Keio Univ.) |
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Break |
Fri, Jun 9 PM Technical Committee Chair: IEICE RECONF Chair 11:30 - 13:00 |
(12) |
11:30-13:00 |
|
Fri, Jun 9 PM Chair: Tomoyoshi Funazaki (DENSO) 13:00 - 14:05 |
(13) |
13:00-13:25 |
Using network FPGAs in the Cloud |
Eric Fukuda (Chiptip) |
(14) |
13:25-13:50 |
Defect prediction by FPGA development phases |
Hiroyuki Uchida, Tomohiko Maruta (FUJIFILM Software) |
|
13:50-14:05 |
Break ( 15 min. ) |
Fri, Jun 9 PM FPGA Applications Chair: Yukio Mitsuyama (Kochi University of Technology) 14:05 - 15:45 |
(15) |
14:05-14:30 |
A Study on Configuration of Digital Filter for 300GHz Band Transmitter based on RFSoC. |
Ryuji Naitou, Yasuaki Monnai (UTokyo) |
(16) |
14:30-14:55 |
An Extension of the Karatsuba Algorithm in Case that the Bit Widths of the Multiplicand and Multiplier are Different |
Susumu Yamazaki (Univ. of Kitakyushu) |
(17) |
14:55-15:20 |
|
|
(18) |
15:20-15:45 |
|
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Fri, Jun 9 PM Closing Remarks and Award Ceremony Chair: Tomonori Izumi (Ritsumeikan University) 15:45 - 16:00 |
|
15:45-15:55 |
Award Ceremony ( 10 min. ) |
|
15:55-16:00 |
Closing Remarks ( 5 min. ) |