Tue, Apr 12 PM
13:00 - 14:15 |
| (1) |
13:00-13:25 |
An Approach and Evaluation of Fault Tolerant Sequential Circuits for Simultaneous Occurrence of Multiple Transient Faults |
Satoshi Fukumoto, Kenta Imai, Hideo Kohinata, Masayuki Arai (Tokyo Metropolitan Univ.) |
| (2) |
13:25-13:50 |
A Note on Data Compression of Double-Precision Floating-Point Numbers for Massively Parallel Numerical Simulations |
Mamoru Ohara, Takashi Yamaguchi (TIRI) |
| (3) |
13:50-14:15 |
A Case Study on Dependable Network-on-Chip Platform for Automotive Applications |
Chammika Mannakkara, Daihan Wang, Vijay Holimath, Tomohiro Yoneda (NII) |
| |
14:15-14:30 |
Break ( 15 min. ) |
Tue, Apr 12 PM
14:30 - 15:30 |
| (4) |
14:30-15:30 |
[Invited Talk]
Tamper LSI Design Methodology Resistant to Malicious Attack |
Takeshi Fujino, Mitsuru Shiozaki (Ritsumeikan Univ.), Masaya Yoshikawa (Meijyo Univ.) |
| |
15:30-15:45 |
Break ( 15 min. ) |
Tue, Apr 12 PM
15:45 - 17:00 |
| (5) |
15:45-16:10 |
Transient-Fault-Tolerant Out-of-Order Superscalar Processor |
Satoshi Arima, Takashi Okada, Ryota Shioya, Masahiro Goshima, Shuichi Sakai (The Univ. of Tokyo) |
| (6) |
16:10-16:35 |
Note on Defect Level Evaluation of Cascaded TMR for Pipeline Processors |
Masayuki Arai, Kazuhiko Iwasaki (Tokyo Metro. Univ.) |
| (7) |
16:35-17:00 |
Highly Flexible Task Tracer IP for the Real-Time OS on FPGA/SoC Environments |
Yuji Takeda, Mamoru Ohara, Tadashi Okabe, Ken Sato (Tokyo Metro. Indust. Tech. Res. Inst.) |
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