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Technical Committee on Dependable Computing (DC)
Chair: Tatsuhiro Tsuchiya (Osaka Univ.) Vice Chair: Toshinori Hosokawa (Nihon Univ.)
Secretary: Masayuki Arai (Nihon Univ.), Kazuteru Namba (Chiba Univ.)
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Technical Committee on Computer Systems (CPSY)
Chair: Kota Nakajima (Fujitsu Lab.)
Vice Chair: Yasushi Inoguchi (JAIST), Tomoaki Tsumura (Nagoya Inst. of Tech.)
Secretary: Ryohei Kobayashi (Univ. of Tsukuba), Shugo Ogawa (Hitachi)
Assistant: Ryuichi Sakamoto (Tokyo Inst. of Tech.), Takumi Honda (Fujitsu)
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Technical Committee on Reconfigurable Systems (RECONF)
Chair: Yoshiki Yamaguchi (Tsukuba Univ.)
Vice Chair: Yasushi Inoguchi (JAIST), Tomonori Izumi (Ritsumeikan Univ.)
Secretary: Yuuki Kobayashi (NEC), Yukinori Sato (Toyohashi Univ. of Tech.)
Assistant: Yukitaka Takemura (INTEL), Yasunori Osana (Kumamoto Univ.)
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Special Interest Group on System Architecture (IPSJ-ARC)
Chair: Tomoaki Tsumura (Nagoya Inst. of Tech.)
Secretary: Hiroe Iwasaki, Takayuki Onishi (NTT), Yasushi Kurihara (Fujitsu), Hayato Yamaki (UEC)
DATE:
Mon, Jun 10, 2024 13:45 - 18:00
Tue, Jun 11, 2024 09:30 - 20:00
Wed, Jun 12, 2024 09:30 - 12:15
PLACE:
TOPICS:
System Architecture, Computer Systems, Dependable Computing, Reconfigurable System, etc.
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Mon, Jun 10 PM (13:45 - 15:00)
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(1)/RECONF 13:45 - 14:10
FPGA Implementation of a One-Instruction-Set Computer and Evaluation of Power Consumption
Ariya Ochirtsogt, Kenji Kanazawa (Tsukuba Univ.)
(2) 14:10 - 14:35
(3) 14:35 - 15:00
----- Break ( 15 min. ) -----
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Mon, Jun 10 PM (15:15 - 16:05)
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(4)/CPSY 15:15 - 15:40
Study of control flow decoupling for controller design exploration in CGRA
Hisako Ito, Takuya Kojima, Hideki Takase, Hiroshi Namkamura (Univ. of Tokyo)
(5) 15:40 - 16:05
----- Break ( 15 min. ) -----
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Mon, Jun 10 PM (16:20 - 18:00)
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(6)/CPSY 16:20 - 16:45
Rapid Inter-Thread Communication Using Message Passing Unit in RISC-V SMT Processor
Go Akamatsu, Shogo Takata, Tomoaki Tanaka, Hironori Nakajo (TUAT)
(7)/RECONF 16:45 - 17:10
Akinobu Tomori, Yasunori Osana (Kumamoto Univ.)
(8)/RECONF 17:10 - 17:35
Preliminary Report on an FPGA-based Prototype of a Network Switch Supporting Asynchronous Traffic Shaping for Time Sensitive Networking
Akram Ben Ahmed, Takahiro Hirofuchi, Takaaki Fukai (AIST)
(9) 17:35 - 18:00
----- Break ( 60 min. ) -----
----- Social Dinner -----
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Tue, Jun 11 AM (09:30 - 10:30)
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(10)/CPSY 09:30 - 09:55
Yasuhiko Nakashima (NAIST)
(11)/RECONF 09:55 - 10:05
A preliminary evaluation of CNNs' performance of meteor detection using training data by generative AI towards FPGA implementation
Zheng Yuping, Kenji Kanazawa (Univ. Tsukuba)
(12) 10:05 - 10:30
----- Break ( 15 min. ) -----
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Tue, Jun 11 PM (10:45 - 11:45)
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(13)/DC 10:45 - 11:10
Fault classification and prediction of AI accelerators based on activation maximization
Ma Shanmou, Kazuteru Namba (Chiba Univ.)
(14)/DC 11:10 - 11:35
A LBIST Method for Detecting Fault Locations in AI Accelerators
Zhang Jiaxi, Namba Kazuteru (Chiba Univ)
(15)/RECONF 11:35 - 11:45
Quantitative quality control efforts in FPGA development.
Kenji Okazaki, Hiroyuki Uchida (FUJIFILM Software Co., Ltd.)
----- Lunch Break ( 90 min. ) -----
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Tue, Jun 11 PM (13:15 - 14:30)
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(16)/DC 13:15 - 13:40
Burst Length Optimization in MLC PCM using Encoding and Merge Sort
Jin Lei, Kazuteru Namba (Chiba Univ.)
(17)/RECONF 13:40 - 14:05
(See Japanese page.)
(18) 14:05 - 14:30
----- Break ( 15 min. ) -----
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Tue, Jun 11 PM (14:45 - 16:00)
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(19) 14:45 - 15:10
(20)/RECONF 15:10 - 15:35
A Framework for Efficient Evaluation of Side-Channel Attack Resistance
-- A Case Study of HLS-designed AES --
Takuya Kojima (UTokyo)
(21) 15:35 - 16:00
----- Break ( 15 min. ) -----
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Tue, Jun 11 PM (16:15 - 17:30)
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(22) 16:15 - 16:40
(23) 16:40 - 17:05
(24) 17:05 - 17:30
----- Break ( 90 min. ) -----
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Tue, Jun 11 PM (19:00 - 20:00)
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(25)/RECONF 19:00 - 19:00
An Example of System Design Using Python (LiteSATA) (Temporary)
Ryohei Niwase (Univ. Tsukuba)
(26)/RECONF 19:00 - 19:00
On the Design and Implementation of Point Cloud-Based Applications with Pynq and High-Level Synthesis
Keisuke Sugiura (Keio Univ.)
(27)/RECONF 19:00 - 19:00
An Example of System Design Using Python (LiteX/MigenDSL) (Temporary)
Yuji Yamada (Tokyo Tech)
(28) 19:00 - 20:00
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Wed, Jun 12 AM (09:30 - 10:45)
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(29)/RECONF 09:30 - 09:55
Exploration and Simulation of FPGA Utilizing 3D-SRAM
Ryo Takahashi (Tokyo Tech), Hiroki Nakahara (Tohoku Univ.)
(30)/RECONF 09:55 - 10:20
Memory-centric CGRA with variable parallelism for neural networks
Atsushi Hori, Fumiya Arai, Tetsuya Asai, Kota Ando (Hokkaido Univ.)
(31) 10:20 - 10:45
----- Break ( 15 min. ) -----
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Wed, Jun 12 PM (11:00 - 12:15)
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(32) 11:00 - 11:25
(33) 11:25 - 11:50
(34) 11:50 - 12:15
# Information for speakers
General Talk will have 20 minutes for presentation and 5 minutes for discussion.
=== Technical Committee on Dependable Computing (DC) ===
# FUTURE SCHEDULE:
Wed, Aug 7, 2024 - Fri, Aug 9, 2024: Awagin Hall [Fri, May 24], Topics: SWoPP2024: Parallel, Distributed and Cooperative Processing Systems and Dependable Computing
# SECRETARY:
Masayuki Arai (College of Industrial Technology, Nihon Univ.)
E-mail: ain-u
=== Technical Committee on Computer Systems (CPSY) ===
# FUTURE SCHEDULE:
Wed, Aug 7, 2024 - Fri, Aug 9, 2024: Awagin Hall [Fri, May 24], Topics: SWoPP2024: Parallel, Distributed and Cooperative Processing Systems and Dependable Computing
# SECRETARY:
CPSY WEB
https://www.ieice.org/~cpsy/
=== Technical Committee on Reconfigurable Systems (RECONF) ===
# FUTURE SCHEDULE:
Wed, Aug 7, 2024 - Fri, Aug 9, 2024: Awagin Hall [Fri, May 24], Topics: SWoPP2024: Parallel, Distributed and Cooperative Processing Systems and Dependable Computing
Tue, Sep 17, 2024 - Wed, Sep 18, 2024 (tentative): [Wed, Jul 17]
# SECRETARY:
Chair: Yoshiki Yamaguchi (Tsukuba Univ.)
# ANNOUNCEMENT:
# RECONF website
http://www.ieice.org/~reconf/
RECONF slack
https://join.slack.com/t/reconfworkspace/shared_invite/zt-v3qeynk3-RsInu4wdjqU2t_ysqWvagg
=== Special Interest Group on System Architecture (IPSJ-ARC) ===
# FUTURE SCHEDULE:
Wed, Aug 7, 2024 - Fri, Aug 9, 2024: Awagin Hall [Fri, May 24], Topics: SWoPP2024: Parallel, Distributed and Cooperative Processing Systems and Dependable Computing
Last modified: 2024-05-22 13:22:01
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