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=============================================== Special Interest Group on Computer Architecture (IPSJ-ARC) Chair: Toshinori Sato Secretary: Koji Kai, Keiji Kimura, Tomoaki Tsumura =============================================== Technical Committee on Integrated Circuits and Devices (ICD) Chair: Masahiko Yoshimoto (Kobe Univ.) Vice Chair: Takeshi Yamamura (Fujitsu Labs.) Secretary: Toshimasa Matsuoka (Osaka Univ.), Ken Takeuchi (Chuo Univ.) Assistant: Osamu Watanabe (Toshiba), Shinichi Ouchi (AIST), Akira Tsuchiya (Kyoto Univ.) DATE: Thu, Jan 31, 2013 10:00 - 17:50 Fri, Feb 1, 2013 10:00 - 15:30 PLACE: (03-3203-4523) TOPICS: ---------------------------------------- Thu, Jan 31 AM (10:00 - 10:45) ---------------------------------------- (1) 10:00 - 10:45 ----- Break ( 15 min. ) ----- ---------------------------------------- Thu, Jan 31 AM (11:00 - 12:00) ---------------------------------------- (2) 11:00 - 11:30 (3) 11:30 - 12:00 ----- Lunch Break ( 60 min. ) ----- ---------------------------------------- Thu, Jan 31 PM (13:00 - 14:30) ---------------------------------------- (4) 13:00 - 13:45 (5)/ICD 13:45 - 14:30 [Invited Talk] GPU/GPGPU trends and development approaches in DMP Eisaku Ohbuchi, Yukitaka Takemura (DMP) ----- Break ( 10 min. ) ----- ---------------------------------------- Thu, Jan 31 PM (14:40 - 16:10) ---------------------------------------- (6) 14:40 - 15:25 (7)/ICD 15:25 - 16:10 [Invited Talk] Real-Time Event Processing on Reconfigurable Hardware Hiroaki Inoue, Takashi Takenaka (NEC) ----- Break ( 10 min. ) ----- ---------------------------------------- Thu, Jan 31 PM (16:20 - 17:50) ---------------------------------------- (8) 16:20 - 17:50 ---------------------------------------- Fri, Feb 1 AM (10:00 - 11:00) ---------------------------------------- (9) 10:00 - 10:30 (10) 10:30 - 11:00 ----- Break ( 10 min. ) ----- ---------------------------------------- Fri, Feb 1 AM (11:10 - 12:10) ---------------------------------------- (11)/ICD 11:10 - 11:40 Data management algorithm for 3D Hybrid ReRAM/MLC NAND SSD and its performance evaluation Shogo Hachiya, Kousuke Miyaji, Koh Johguchi, Ken Takeuchi (Chuo Univ.) (12)/ICD 11:40 - 12:10 Programming Circuit of Multi-level ReRAM Utilizing Voltage Sense-Amplifier Taiki Ibe, Kazuya Nakayama, Akio Kitagawa (Kanazawa Univ.) ----- Lunch Break ( 80 min. ) ----- ---------------------------------------- Fri, Feb 1 PM (13:30 - 15:30) ---------------------------------------- (13) 13:30 - 14:00 (14) 14:00 - 14:30 (15) 14:30 - 15:00 (16) 15:00 - 15:30 # Information for speakers General Talk will have 20 minutes for presentation and 10 minutes for discussion. Invited Talk will have 35 minutes for presentation and 10 minutes for discussion. === Special Interest Group on Computer Architecture (IPSJ-ARC) === # SECRETARY: Keiji KIMURA (Waseda Univ.) TEL 03-3203-4481, FAX 03-3203-4523 E-mail:      al      === Technical Committee on Integrated Circuits and Devices (ICD) === # FUTURE SCHEDULE: Mon, Mar 4, 2013 - Tue, Mar 5, 2013: Chuo University [Thu, Feb 7], Topics: Silicon Analog RF Thu, Apr 11, 2013 - Fri, Apr 12, 2013: Advanced Industrial Science and Technology (AIST) [Tue, Feb 5], Topics: Memory Device Technologies # SECRETARY: Osamu WATANABE (Toshiba Corporation) TEL 044-549-2283, FAX 044-520-1806 E-mail: o  7  be  ba Last modified: 2013-01-28 10:35:05 |
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