IEICE Technical Committee Submission System
Advance Program
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top  Go Back   Prev ICD Conf / Next ICD Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


Technical Committee on Integrated Circuits and Devices (ICD) [schedule] [select]
Chair Takeshi Yamamura (Fujitsu Labs.)
Vice Chair Minoru Fujishima (Hiroshima Univ.)
Secretary Osamu Watanabe (Toshiba)
Assistant Takeshi Yoshida (Hiroshima Univ.), Makoto Takamiya (Univ. of Tokyo), Akira Tsuchiya (Kyoto Univ.), Pham Konkuha (Univ. of Electro-Comm.)

Conference Date Thu, Apr 16, 2015 13:00 - 18:00
Fri, Apr 17, 2015 10:00 - 17:00
Topics  
Conference Place  
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Thu, Apr 16 PM 
13:00 - 14:15
(1) 13:00-13:25 [Invited Lecture]
20nm High-Density Single-Port and Dual-Port SRAMs with Wordline-Voltage-Adjustment System for Read/Write Assists ICD2015-1
Makoto Yabuuchi, Yasumasa Tsukamoto, Masao Morimoto, Miki Tanaka, Koji Nii (Renesas)
(2) 13:25-13:50 [Invited Lecture]
A 512-kb 1-GHz 28-nm Partially Write Assisted Dual-Port SRAM with Self Adjustable Negative Bias Bitline ICD2015-2
Shinji Tanaka (Renesas Electronics), Yuichiro Ishii, Makoto Yabuuchi (Renesas), Toshiaki Sano (Renesas System Design), Koji Tanaka, Yasumasa Tsukamoto, Koji Nii, Hirotoshi Sato (Renesas)
(3) 13:50-14:15 [Invited Lecture]
40 nm Dual-port and Two-port SRAMs for Automotive MCU Applications under the Wide Temperature Range of -40 to 170℃ with Test Screening Against Write Disturb Issues ICD2015-3
Yoshisato Yokoyama, Yuichiro Ishii, Tatsuya Fukuda, Yoshiki Tsujihashi, Atsushi Miyanishi (Renesas Electronics), Shinobu Asayama, Keiichi Maekawa, Kazutoshi Shiba (Renesas Semiconductor Manufacturing Corporation), Koji Nii (Renesas Electronics)
  14:15-14:25 Break ( 10 min. )
Thu, Apr 16 PM 
14:25 - 18:00
(4) 14:25-15:15 [Invited Talk]
A 28nm Embedded SG-MONOS Flash Macro for Automotive Achieving 200MHz Read Operation and 2.0MB/s Write Throughput at Tj of 170℃ ICD2015-4
Makoto Muneyasu, Yasuhiko Taito, Masaya Nakano, Takashi Ito, Takashi Kono, Kenji Noguchi, Hideto Hidaka, Tadaaki Yamauchi (Renesas)
(5) 15:15-16:05 [Invited Talk]
Reliability enhancement techniques of TLC NAND Flash Solid-State Drives (SSDs) for archive and enterprise applications ICD2015-5
Shogo Hachiya, Shuhei Tanakamaru, Tsukasa Tokutomi, Masafumi Doi, Yuta Kitamura, Senju Yamazaki, Atsuro Kobayashi, Ken Takeuchi (Chuo Univ.)
(6) 16:05-16:30 [Invited Lecture]
A Low-Power 64Gb MLC NAND-Flash Memory in 15nm CMOS Technology ICD2015-6
Mario Sako, Takao Nakajima, Junpei Sato, Kazuyoshi Muraoka, Masaki Fujiu, Fumihiro Kono, Michio Nakagawa, Masami Masuda, Koji Kato, Yuri Terada, Yuki Shimizu, Mitsuaki Honma, Yoshinao Suzuki, Yoshihisa Watanabe (Toshiba), Ryuji Yamashita (SanDisk)
  16:30-16:40 Break ( 10 min. )
(7) 16:40-18:00 [Panel Discussion]
Advanced semiconductor memories in cloud computing and high-performance computing ICD2015-7
Koji Nii (Renesas Electronics), Kousuke Miyaji (Shinshu Univ.), Ryousei Takano (AIST), Kensei Takagi, Toru Miwa (SanDisk)
Fri, Apr 17 AM 
10:00 - 11:40
(8) 10:00-10:50 [Invited Talk]
GexTe1-x/Sb2Te3 Topological switching random access memory (TRAM) ICD2015-8
Norikatsu Takaura (LEAP)
(9) 10:50-11:40 [Invited Talk]
A 128kb 4bit/cell Nonvolatile Memory with Crystalline In-Ga-Zn Oxide FET Using Vt Cancel Write Method ICD2015-9
Takanori Matsuzaki, Tatsuya Onuki, Shuhei Nagatsuka, Hiroki Inoue, Takahiko Ishizu, Yoshinori Ieda, Masayuki Sakakura, Tomoaki Atsumi, Yutaka Shionoiri, Kiyoshi Kato, Takashi Okuda, Yoshitaka Yamamoto (SEL), Masahiro Fujita (The Univ. of Tokyo), Jun Koyama, Shunpei Yamazaki (SEL)
  11:40-12:40 ( 60 min. )
Fri, Apr 17 PM 
12:40 - 14:45
(10) 12:40-13:30 [Invited Talk]
Low-power Embedded Perpendicular STT-MRAM Design for Cache Memory ICD2015-10
Hiroki Noguchi, Kazutaka Ikegami, Keiichi Kushida, Keiko Abe, Shogo Itai, Satoshi Takaya, Chika Tanaka, Chikayoshi Kamata, Minoru Amano, Eiji Kitagawa, Naoharu Shimomura, Atsushi Kawasumi, Hiroyuki Hara, Junichi Ito, Shinobu Fujita (Toshiba)
(11) 13:30-13:55 [Invited Lecture]
A 2.4 pJ Ferroelectric-Based Non-Volatile Flip-Flop with 10-Year Data Retention Capability ICD2015-11
Hiromitsu Kimura, Takaaki Fuchikami, Kyoji Marumoto, Yoshikazu Fujimori (ROHM), Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.)
(12) 13:55-14:45 [Tutorial Lecture]
Nonvolatile Logic-in-Memory Architecture and Its Applications to Low-Power VLSI System ICD2015-12
Takahiro Hanyu, Daisuke Suzuki, Akira Mochizuki, Masanori Natsui, Naoya Onizawa (Tohoku Univ.), Tadahiko Sugibayashi (NEC), Shoji Ikeda, Tetsuo Endoh, Hideo Ohno (Tohoku Univ.)
  14:45-14:55 Break ( 10 min. )
Fri, Apr 17 PM 
14:55 - 17:00
(13) 14:55-15:45 [Invited Talk]
An 1800-Times-Higher Power-Efficient 20k-spin Ising Chip for Combinatorial Optimization Problem with CMOS Annealing ICD2015-13
Masanao Yamaoka, Chihiro Yoshimura, Masato Hayashi, Takuya Okuyama, Hidetaka Aoki, Hiroyuki Mizuno (Hitachi)
(14) 15:45-16:35 [Invited Talk]
Non-Contact Memory Interface using Transmission Line Coupler ICD2015-14
Atsutake Kosuge, Junichiro Kadomoto, Tadahiro Kuroda (Keio Univ.)
(15) 16:35-17:00 [Invited Lecture]
An Inductive-Coupling Interface Using Partially Overlapping Coil for WIO2 and Beyond ICD2015-15
Yasuhiro Take, Tadahiro Kuroda (Keio Univ.)

Announcement for Speakers
Invited TalkEach speech will have 40 minutes for presentation and 10 minutes for discussion.
Tutorial LectureEach speech will have 40 minutes for presentation and 10 minutes for discussion.
General Talk (依頼講演)Each speech will have 20 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
ICD Technical Committee on Integrated Circuits and Devices (ICD)   [Latest Schedule]
Contact Address  


Last modified: 2015-03-18 03:20:59


Notification: Mail addresses are partially hidden against SPAM.

[Download Paper's Information (in Japanese)] <-- Press download button after click here.
 
[Cover and Index of IEICE Technical Report by Issue]
 

[Presentation and Participation FAQ] (in Japanese)
 

[Return to ICD Schedule Page]   /  
 
 Go Top  Go Back   Prev ICD Conf / Next ICD Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan