|
|
| Chair |
|
Masato Motomura (Tokyo Tech.) |
| Vice Chair |
|
Yuichiro Shibata (Nagasaki Univ.), Kentaro Sano (RIKEN) |
| Secretary |
|
Kazuya Tanigawa (Hiroshima City Univ.), Takefumi Miyoshi (e-trees.Japan) |
| Assistant |
|
Yuuki Kobayashi (NEC), Hiroki Nakahara (Tokyo Inst. of Tech.) |
|
| Conference Date |
Thu, May 9, 2019 12:35 - 18:10
Fri, May 10, 2019 10:00 - 15:55 |
| Topics |
Reconfigurable system, etc. |
| Conference Place |
|
Copyright
and
reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Notes on Review |
This article is a technical report without peer review, and its polished version will be published elsewhere. |
| Registration Fee |
This workshop will be held as the IEICE workshop in fully electronic publishing. Registration fee will be necessary except the speakers and participants other than the participants to workshop(s) in non-electronic publishing. See the registration fee page. We request the registration fee or presentation fee to participants who will attend the workshop(s) on RECONF. |
Thu, May 9 PM
12:35 - 13:50 |
| (1) |
12:35-13:00 |
Efficient Instruction Fetch Architectures for a RISC-V Soft Processor  RECONF2019-1 |
Hiromu Miyazaki, Junya Miura, Kenji Kise (Tokyo Tech) |
| (2) |
13:00-13:25 |
RECONF2019-2 |
|
| (3) |
13:25-13:50 |
RECONF2019-3 |
|
Thu, May 9 PM
14:10 - 15:00 |
| (4) |
14:10-14:35 |
Study of new stacked type logic circuit scheme with fabrication technology of 3D flash memory. RECONF2019-4 |
Fumiya Suzuki, Shigeyoshi Watanabe (Shonan Inst. of Tech.) |
| (5) |
14:35-15:00 |
RECONF2019-5 |
|
Thu, May 9 PM
15:20 - 17:00 |
| (6) |
15:20-15:45 |
High Level Synthesis of Recursive Description in a CPU+FPGA Co-design framework based on Ruby RECONF2019-6 |
Ryota Yamashita, Daichi Teruya, Hironori Nakajo (TUAT) |
| (7) |
15:45-16:10 |
RECONF2019-7 |
Hideki Takase (Kyoto Univ./JST), Kentaro Matsui (Kyoto Univ.), Yoshihiro Ueno (Delight Systems), Masakazu Mori (karabiner.inc), Susumu Yamazaki (Univ. of Kitakyushu) |
| (8) |
16:10-16:35 |
A CNN-based Classifier for a Digital Spectrometer on a Radio Telescope RECONF2019-19 |
Hiroki Nakahara, Shimpei Sato (Titech) |
| (9) |
16:35-17:00 |
A case study of an FPGA implementation for streaming data filtering RECONF2019-8 |
Hiroki Nakagawa, Yasutaka TsuTsumi, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) |
Thu, May 9 PM
17:20 - 18:10 |
| (10) |
17:20-18:10 |
[Invited Talk]
Engineers' and Scientists' Way of Life RECONF2019-9 |
Kazuyuki Shudo (Tokyo Tech) |
Fri, May 10 AM
10:00 - 11:40 |
| (11) |
10:00-10:25 |
An FPGA Implementation of the Semantic Segmentation Model with Multi-path Structure RECONF2019-10 |
Youki Sada, Masayuki Shimoda, Shimpei Sato, Hiroki Nakahara (titech) |
| (12) |
10:25-10:50 |
RECONF2019-11 |
|
| (13) |
10:50-11:15 |
Tsunami Simulation on FPGA by Exploiting Temporal Parallelism using OpenCL RECONF2019-12 |
Fumiya Kono (Kobe Univ.), Naohito Nakasato (UoA) |
| (14) |
11:15-11:40 |
A case study of system development based on software hardware co-design using an FPGA/CPU mixed SoC
-- Implementation of the Julia set explorer using Ultra96 -- RECONF2019-13 |
Kenta Sato, Yukinori Sato (TUT) |
Fri, May 10 PM
13:30 - 14:45 |
| (15) |
13:30-13:55 |
RECONF2019-14 |
|
| (16) |
13:55-14:20 |
Deep Learning Framework with Numerical Precision RECONF2019-15 |
Masato Kiyama, Motoki Amagasaki, Masahiro Iida (Kumamoto Univ.) |
| (17) |
14:20-14:45 |
RECONF2019-18 |
|
Fri, May 10 PM
15:05 - 15:55 |
| (18) |
15:05-15:30 |
RECONF2019-17 |
|
| (19) |
15:30-15:55 |
Spatial-Separable Convolution: Low memory CNN for FPGA RECONF2019-16 |
Akira Jinguji, Masayuki Shimoda, Hiroki Nakahara (titech) |
| Announcement for Speakers |
| General Talk | Each speech will have 20 minutes for presentation and 5 minutes for discussion. |
Last modified: 2019-05-09 14:36:32
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