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Technical Committee on VLSI Design Technologies (VLD)  (2024 - )

Chair: Yuichi Sakurai (Hitachi) Vice Chair: Hiroyuki Tomiyama (Ritsumeikan Univ.)
Secretary: Yukihiro Sasagawa (Socionext), Kenshu Seto (Kumamot Univ.)
Assistant: Takuma Nishimoto (Hitachi), Ami TANAKA (Rits), Masayuki Odagawa (Cadence Design Systems, Japan)
[Go to Official VLD Homepage (Japanese)] 
 Schedule  (Sort by: Date Ascending)
 Results 1 - 4 of 4  /   
Date Place Topics Joint Deadline Select Menu
Thu, May 9, 2024
- Fri, May 10
(Primary: On-site, Secondary: Online)		   ICD, CPSY, HWS, IPSJ-ARC, DC, IPSJ-SLDM
(2nd)		 [Fri, Apr 19]
  • Detailed Info.
       (Japanese)
  • Regist. Closed 
    		•
    Thu, Jul 18, 2024
    - Fri, Jul 19
    (Primary: On-site, Secondary: Online)    		   CAS, SIP, MSS [Tue, May 14]
  • Regist. Closed
  • Adv. Program
  • Registration Fee 
    		•
    Tue, Nov 12, 2024
    - Thu, Nov 14    		 COMPAL HALL
    (Primary: On-site, Secondary: Online)    		 Design Gaia 2024 -New Field of VLSI Design- VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] [Fri, Sep 6]
  • Detailed Info.
  • Regist. Closed
  • Adv. Program
  • Registration Fee 
    		•
    Thu, Jan 16, 2025
    - Fri, Jan 17    		 Yokohama Technology Campus Flagship Building
    (Primary: On-site, Secondary: Online)    		 FPGA Applications, etc. RECONF [Fri, Nov 15]
  • Detailed Info.
  • Regist. Closed
  • Adv. Program
  • Registration for Online
  • Registration Fee 
    		•
     Results 1 - 4 of 4  /   

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