Information: Join today and make your research activities more affordable! Technical workshop participation fees and annual registration fees are available at member rates.
Notice: [Important] Announcement of Changes to Registration Fee Payment and Manuscript Upload Procedures for IEICE Technical Meetings[Type 1 Only]
NOTICE: Due to an emergency maintenance from Oct. 22, 2026, some system functions are currently restricted. Manuscript uploads are unavailable from October 26 through October 30. For speakers whose manuscript submission deadline within this period, we will provide individual guidance on how to upload. We apologize for the inconvenience.
IEICE Technical Committee Submission System
Conference Schedule		 Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM)  (2026 - )


Chair: Toshiki Kanamoto (Hirosaki Univ.)
Secretary: Ryo Kishida (Toyama Prefectural Univ.), Takeshi Kumaki (Ritsumeikan Univ.), Tomonori Igarashi (Renesas), Takao Inoue (Nuvoton)

[Go to Official IPSJ-SLDM Homepage (Japanese)] 
 Schedule  (Sort by: Date Ascending)
 Results 1 - 2 of 2  /   
Date Place Topics Joint Deadline Select Menu
Wed, May 13, 2026
- Thu, May 14		 (Tokyo, Online)
(Primary: On-site, Secondary: Online)		   ICD, VLD, CPSY, HWS, IPSJ-ARC, DC
(2nd)		 [Wed, Apr 22]
  • Detailed Info.
  • Regist. Closed 
    		•
    Wed, Dec 2, 2026
    - Fri, Dec 4    		 Sapporo Education and Culture Hall (Hokkaido) Design Gaia 2026 -New Field of VLSI Design- VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] [Fri, Sep 18]
  • Detailed Info.
  • Regist. Closed
  • Adv. Program
  • Registration Fee 
    		•
     Results 1 - 2 of 2  /   

    [Return to Top Page]

    [Return to IEICE Web Page]

    (Line Height for English Pages: 1)
    The Institute of Electronics, Information and Communication Engineers (IEICE), Japan