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|
| Chair |
|
Hidetsugu Irie (Univ. of Tokyo) |
| Vice Chair |
|
Michihiro Koibuchi (NII), Kota Nakajima (Fujitsu Lab.) |
| Secretary |
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Tomoaki Tsumura (Nagoya Inst. of Tech.), Shinya Takameda (Hokkaido Univ.) |
| Assistant |
|
Eiji Arima (Univ. of Tokyo), Shugo Ogawa (Hitachi) |
|
|
|
| Chair |
|
Satoshi Fukumoto (Tokyo Metropolitan Univ.) |
| Vice Chair |
|
Hiroshi Takahashi (Ehime Univ.) |
| Secretary |
|
Masayuki Arai (Nihon Univ.), Kazuteru Namba (Chiba Univ.) |
|
|
|
| Chair |
|
Hiroshi Inoue (Kyushu Univ.) |
| Secretary |
|
Masaaki Kondo (Univ. of Tokyo), Ryota Shioya (Nagoya Univ.), Miho Tanaka (Fujitsu Labs.), Yohei Hasegawa (Toshiba Memory) |
|
| Conference Date |
Tue, Jun 11, 2019 13:00 - 18:20
Wed, Jun 12, 2019 09:00 - 15:30 |
| Topics |
Architecture, Computer Systems, Dependable Computing, etc. (HotSPA2019) |
| Conference Place |
|
Copyright
and
reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Registration Fee |
This workshop will be held as the IEICE workshop in fully electronic publishing. Registration fee will be necessary except the speakers and participants other than the participants to workshop(s) in non-electronic publishing. See the registration fee page. We request the registration fee or presentation fee to participants who will attend the workshop(s) on DC, CPSY. |
Tue, Jun 11 PM
13:00 - 14:00 |
(1)
CPSY |
13:00-13:20 |
 CPSY2019-1 DC2019-1 |
|
| (2) |
13:20-13:40 |
|
| (3) |
13:40-14:00 |
|
Tue, Jun 11 PM
14:10 - 15:10 |
(4)
CPSY |
14:10-14:30 |
Data Compression System of Storage Compatible with High Performance and High Compression Rate CPSY2019-2 DC2019-2 |
Yusuke Yamaga, Takaki Matsushita, Kazuei Hironaka, Tomohiro Kawaguchi (Hitachi) |
(5)
CPSY |
14:30-14:50 |
Proposal and Development of Copy Speed Control Method for Non-disruptive Migration between Storage Systems CPSY2019-3 DC2019-3 |
Akihiro Hara, Hiroaki Akutsu, Tomohiro Kawaguchi (Hitachi) |
(6)
DC |
14:50-15:10 |
Note on Fast SAT-Based SDN Rule Table Partitioning CPSY2019-4 DC2019-4 |
Ryota Ogasawara, Masayuki Arai (Nihon Univ.) |
Tue, Jun 11 PM
15:20 - 16:40 |
(7)
CPSY |
15:20-15:40 |
Accelerating Deep Learning for Multiple GPUs using FPGA Based Switch CPSY2019-5 DC2019-5 |
Tomoya Itsubo, Kazuma Takemoto, Hiroki Matsutani (Keio Univ.) |
(8)
CPSY |
15:40-16:00 |
CPSY2019-6 DC2019-6 |
|
(9)
CPSY |
16:00-16:20 |
CPSY2019-7 DC2019-7 |
|
(10)
CPSY |
16:20-16:40 |
CPSY2019-8 DC2019-8 |
|
Tue, Jun 11 PM
16:50 - 18:20 |
| (11) |
16:50-18:20 |
|
| |
- |
Day 2 |
Wed, Jun 12 AM
09:00 - 10:00 |
(12)
CPSY |
09:00-09:20 |
CPSY2019-9 DC2019-9 |
|
| (13) |
09:20-09:40 |
|
| (14) |
09:40-10:00 |
|
Wed, Jun 12 AM
10:10 - 11:30 |
(15)
CPSY |
10:10-10:30 |
Detection of Reflected XSS by Using Dynamic Information Flow Tracking CPSY2019-10 DC2019-10 |
Shunsuke Tsukamoto, Shuichi Sakai, Hidetsugu Irie (Tokyo Univ.) |
(16)
CPSY |
10:30-10:50 |
An Implementation of Secure Context Switch for OpenrRISC CPSY2019-11 DC2019-11 |
Yuichiro Arima, Shuichi Sakai, Hidetsugu Irie (Tokyo Univ.) |
(17)
DC |
10:50-11:10 |
CPSY2019-12 DC2019-12 |
|
(18)
DC |
11:10-11:30 |
NA CPSY2019-13 DC2019-13 |
Ryota Ishikawa, Masashi Tawada, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) |
| |
11:30-12:40 |
Break ( 70 min. ) |
Wed, Jun 12 PM
12:40 - 13:10 |
| (19) |
12:40-13:10 |
|
Wed, Jun 12 PM
13:20 - 14:00 |
(20)
CPSY |
13:20-13:40 |
Accelaration of ART algorithm using Xilinx SDAccel CPSY2019-14 DC2019-14 |
Okamoto Yasuaki, Amano Hideharu (Keio Univ.) |
(21)
CPSY |
13:40-14:00 |
Implementation of Multi-agent SLAM CPSY2019-15 DC2019-15 |
Ryosuke Kazami, Hideharu Amano (Keio Univ.) |
Wed, Jun 12 PM
14:10 - 15:30 |
(22)
CPSY |
14:10-14:30 |
A Study of an Open-Source Memory Compiler for a Multi-Port Memory CPSY2019-16 DC2019-16 |
Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai (The Univ. of Tokyo) |
| (23) |
14:30-14:50 |
|
| (24) |
14:50-15:10 |
|
| (25) |
15:10-15:30 |
|
| |
- |
Closing |
| Announcement for Speakers |
| General Talk | Each speech will have 15 minutes for presentation and 5 minutes for discussion. |
| Contact Address and Latest Schedule Information |
| CPSY |
Technical Committee on Computer Systems (CPSY) [Latest Schedule]
|
| Contact Address |
Takashi Miyoshi (FUJITSU)
TEL +81-44-754-2931, FAX +81-44-754-2672
E- :           
CPSY WEB
http://www.ieice.or.jp/iss/cpsy/jpn/ |
| DC |
Technical Committee on Dependable Computing (DC) [Latest Schedule]
|
| Contact Address |
Masayuki Arai (College of Industrial Technology, Nihon Univ.)
E-: a i      n-u |
| IPSJ-ARC |
Special Interest Group on System Architecture (IPSJ-ARC) [Latest Schedule]
|
| Contact Address |
|
Last modified: 2019-05-29 17:29:12
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