Tue, Feb 20 AM
09:30 - 10:20 |
| (1) |
09:30-09:55 |
Note on Weighted Fault Coverage for Two-Pattern Tests |
Masayuki Arai (Nihon Univ.), Kazuhiko Iwasaki (Tokyo Metro. Univ.) |
| (2) |
09:55-10:20 |
A Test Register Assignment Method for Operational Units to Reduce the Number of Test Patterns for Transition Faults Using Controller Augmentation |
Yuki Takeuchi, Shun Takeda, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.) |
| |
10:20-10:35 |
Break ( 15 min. ) |
Tue, Feb 20 AM
10:35 - 11:25 |
| (3) |
10:35-11:00 |
Reduction of Wire Length by Reordering Delay Elements in Boundary Scan Circuit with Embedded TDC |
Satoshi Hirai, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) |
| (4) |
11:00-11:25 |
Locating Hot Spots with Justification Techniques in a Layout Design |
Yudai Kawano, Kohei Miyase, Seiji Kajihara, Xiaoqing Wen (Kyutech) |
| |
11:25-11:40 |
Break ( 15 min. ) |
Tue, Feb 20 AM
11:40 - 12:30 |
| (5) |
11:40-12:05 |
A test generation method based on k-cycle testing for finite state machines |
Yuya Kinoshita, Toshinori Hosokawa (Nihon Univ.), Hideo Fujiwara (Osaka Gakuin Univ.) |
| (6) |
12:05-12:30 |
On generating locating arrays using simulated annealing |
Tatsuya Konishi, Hideharu Kojima, Hiroyuki Nakagawa, Tatsuhiro Tsuchiya (Osaka Univ.) |
| |
12:30-14:00 |
Break ( 90 min. ) |
Tue, Feb 20 PM
14:00 - 14:50 |
| (7) |
14:00-14:25 |
A Note on Stateless Avoidance Routing in Ad Hoc Networks |
Tomonori Maeda, Kazuya Sakai, Satoshi Fukumoto (Tokyo Metropolitan Univ.) |
| (8) |
14:25-14:50 |
A Golden-Free Hardware Trojan Detection Technique Considering Intra-Die Variation |
Fakir Sharif Hossain, Tomokazu Yoneda, Michihiro Shintani, Michiko Inoue (NAIST), Alex Orailoglu (Univ. of California, San Diego) |
| |
14:50-15:05 |
Break ( 15 min. ) |
Tue, Feb 20 PM
15:05 - 15:55 |
| (9) |
15:05-15:30 |
A method for improving an estimation accuracy of a specific temperature and voltage range in a digital temperature and voltage sensor |
Kenji Inoue, Yousuke Miyake, Seiji Kajihara (Kyutech) |
| (10) |
15:30-15:55 |
Investigation of a Measurement Method of Characteristic Variations in the FPGA Considering an LUT Structure |
Kouhei Satou, Yukiya Miura (Tokyo Metropolitan Univ.) |
| |
15:55-16:10 |
Break ( 15 min. ) |
Tue, Feb 20 PM
16:10 - 17:00 |
| (11) |
16:10-16:35 |
Testing the Bridge Interconnect Fault for Memory based Reconfigurable Logic Device (MRLD) |
Senling Wang, Tatsuya Ogawa, Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.), Masayuki Sato, Mitsunori Katsu (TRL), Shoichi Sekiguchi (TAIYOYUDEN) |
| (12) |
16:35-17:00 |
Influence on Flip-Flop Behaviors by Power Supply Noise and Proposal of their Countermeasures |
Miyuki Inoue, Yukiya Miura (Tokyo Metropolitan Univ.) |