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=============================================== Technical Committee on VLSI Design Technologies (VLD) Chair: Kimiyoshi Usami (Shibaura Inst. of Tech.) Vice Chair: Akihisa Yamada (Sharp) Secretary: Kazutoshi Kobayashi (Kyoto Inst. of Tech.), Takashi Takenaka (NEC) DATE: Mon, Sep 26, 2011 14:00 - 17:35 Tue, Sep 27, 2011 09:20 - 12:00 PLACE: University-Business Innovation Center, the University of Aizu(Tsuruga, Ikki-machi, Aizu-Wakamatsu City Fukushima, 965-8580 Japan. 10 Minute by bus or Taxi from JR Aizuwakamatsu Station. (Bus is not frequent, Check the time table)). http://www.u-aizu.ac.jp/e-access.html. Prof. Yukihide Kohira. +81-242-37-2776 (Conference Venue)) TOPICS: Physical-level Design, etc. ---------------------------------------- Mon, Sep 26 PM (14:00 - 15:15) ---------------------------------------- (1) 14:00 - 14:25 A transistor-level symmetrical layout generation method for analog device Bo Yang, Qing Dong, Jing Li, Shigetoshi Nakatake (Univ. of Kitakyushu) (2) 14:25 - 14:50 CMOS Op-amp Circuit Synthesis with Geometric Programming Models for Layout-Dependent Effects Yu Zhang, Gong Chen, Qing Dong, Jing Li, Bo Yang, Shigetoshi Nakatake (Univ. of Kitakyushu) (3) 14:50 - 15:15 MSA: Mixed Stochastic Algorithm for Placement with Larger Solution Space Yiqiang Sheng (Tokyo Inst. of Tech.), Atsushi Takahashi (Osaka Univ.), Shuichi Ueno (Tokyo Inst. of Tech.) ----- Break ( 15 min. ) ----- ---------------------------------------- Mon, Sep 26 PM (15:30 - 16:20) ---------------------------------------- (4) 15:30 - 15:55 Analytical Placement for Closed-Symmetrical Placement Yasuhiro Takashima, Yusuke Oya (Univ. of Kitakyushu) (5) 15:55 - 16:20 On set pair routing problem Atsushi Takahashi (Osaka Univ.) ----- Break ( 15 min. ) ----- ---------------------------------------- Mon, Sep 26 PM (16:35 - 17:35) ---------------------------------------- (6) 16:35 - 17:35 [Invited Talk] Bondage: A legal interconnect to define a reasonable placement Yoji Kajitani (Univ. of Kitakyushu) ---------------------------------------- Tue, Sep 27 AM (09:20 - 10:35) ---------------------------------------- (7) 09:20 - 09:45 A Reconfigurable Layout Method and Evaluation for Network on Chip Yuichi Nakamura (NEC) (8) 09:45 - 10:10 Evaluation of Net-based Move in Placement for a Memory-based Reconfigurable Device MPLD Masato Inagi, Masatoshi Nakamura, Tetsuo Hironaka (Hiroshima City Univ.), Takashi Ishiguro (Taiyo Yuden) (9) 10:10 - 10:35 A Design Method of Network-on-Chip Architecture for FPGA Hideki Katabami, Hiroshi Saito (Aizu Univ.) ----- Break ( 10 min. ) ----- ---------------------------------------- Tue, Sep 27 AM (10:45 - 12:00) ---------------------------------------- (10) 10:45 - 11:10 A statistical evaluation of approximate methods for soft error tolerance analysis of combinational circuits Hidenori Ayabe, Masayoshi Yoshimura, Yusuke Matsunaga (Kyushu Univ.) (11) 11:10 - 11:35 Acceleration of Smith-Waterman Algorithm using a Pipelined Array Processor Asuka Tanaka, Shizuka Ishikawa, Toshiaki Miyazaki (Univ. of Aizu) (12) 11:35 - 12:00 Multi-Domain Clock Skew Scheduling-Aware High-Level Synthesis Keisuke Inoue, Mineo Kaneko (JAIST) # Information for speakers General Talk will have 20 minutes for presentation and 5 minutes for discussion. Invited Talk will have 50 minutes for presentation and 10 minutes for discussion. # CONFERENCE SPONSORS: - This conference is co-sponsored by the IEEE CAS Japan Chapter # CONFERENCE ANNOUNCEMENT: - Please join the party at the first night. - It is comfortable to take the rapid train "Aizu" between Kooriyama and Aiduwakamatsu. - Please check the bus schedule from Aizuwakamatsu Station. Bus is not frequent. === Technical Committee on VLSI Design Technologies (VLD) === # FUTURE SCHEDULE: Mon, Nov 28, 2011 - Wed, Nov 30, 2011: NewWelCity Miyazaki [Thu, Sep 1], Topics: Design Gaia 2010 -New Field of VLSI Design- # SECRETARY: Kazutoshi Kobayashi (Kyoto Institute of Technology) E-mail:       ba   t Tel: +81-75-724-7452 # ANNOUNCEMENT: # See also VLD's homepage: http://www.ieice.org/~vld/ Last modified: 2011-09-09 09:03:30 |
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