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Technical Committee on Hardware Security (HWS)
Chair: Shinichi Kawamura (Toshiba)
Vice Chair: Makoto Ikeda (Univ. of Tokyo), Yasuhisa Shimazaki (Renesas Electronics)
Secretary: Hiroki Kunii (SECOM), Takatsugu Ono (Kyushu Univ.)

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Technical Committee on Integrated Circuits and Devices (ICD)
Chair: Makoto Nagata (Kobe Univ.) Vice Chair: Masafumi Takahashi (Toshiba-memory)
Secretary: Masanori Natsui (Tohoku Univ.), Masatoshi Tsuge (Socionext)
Assistant: Tetsuya Hirose (Osaka Univ.), Koji Nii (Floadia), Takeshi Kuboki (Kyushu Univ.)

DATE:
Fri, Nov 1, 2019 13:00 - 17:40

PLACE:
DNP Namba SS Bld.(550-0015, 1-17-28, Minamihorie, Nishi-ku, Osaka-shi, Osaka, Japan.https://www.dnp.co.jp/corporate/information/location/map/1188991_1561.html)

TOPICS:
Hardware Security, etc.

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Fri, Nov 1 PM (13:00 - 17:40)
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(1) 13:00 - 13:25
Implementation and Evaluation of EC-ElGamal Encryption with a Twisted Montgomery Curve over Tower Field on Arduino
Yuta Hashimoto, Tadaki Kanenari, Takuya Kusaka, Yasuyuki Nogami (Okayama Univ.)

(2) 13:25 - 13:50
An Implementation of Tate and Ate Pairing of Embedding Degree 14
Zihao Song, Rikuya Matsumura, Yuki Nanjo, Yasuyuki Nogami, Takuya Kusaka (Okayama Univ.)

(3) 13:50 - 14:15
A Study on Correlation Electromagnetics Analysis on Pairing-based Cryptographic Hardware of Unified Hardware
Yuma Kadowaki, Rei Ueno, Ville Yli-Mäyry (Tohoku Univ.), Daisuke Fujimoto, Yuichi Hayashi (NAIST), Makoto Nagata (Kobe Univ.), Makoto Ikeda (UT), Tsutomu Matsumto (YNU), Naofumi Homma (Tohoku Univ.)

(4) 14:15 - 14:40
A Design of Isogeny-Based Cryptographic Hardware Architecture Using Residue Number System
Shuto Funakoshi, Rei Ueno, Naofumi Homma (Tohoku Univ.)

----- Break ( 15 min. ) -----

(5) 14:55 - 15:20
Countermeasures for power noise and side-channel leakage in crypto modules (Ⅱ)
Kazuki Monta, Akihiro Tsukioka, Daichi Nakagawa, Kazuki Yasuoka, Noriyuki Miura, Makoto Nagata (Kobe Univ.), Karthik Srinivasan, Shan Wan, Lang Lin, Ying-Siun Li, Norman Chang (ANSYS)

(6) 15:20 - 15:45
Fundamental study on an estimation method of output bits from TERO-based TRNG during frequency injection attack
Saki Osuka, Daisuke Fujimoto, Yuichi Hayashi (NAIST)

----- Break ( 15 min. ) -----

(7) 16:00 - 16:25
A Study of Hardware Trojan Detection Method using Deep Learning in Asynchronous Circuits
Hikaru Inafune, Masashi Imai (Hirosaki Univ.)

(8) 16:25 - 16:50
Demonstration of Adversarial Examples for Hardware Trojan Detection
Kohei Nozawa, Kento Hasegawa (Waseda Univ.), Seira Hidano, Shinsaku Kiyomoto (KDDI Research), Kazuo Hashimoto, Nozomu Togawa (Waseda Univ.)

(9) 16:50 - 17:15
Physical-level detection approach against hardware Trojans inside semiconductor chips (I)
Shinichi Kawamura, Kentaro Imafuku, Hirofumi Sakane, Yohei Hori (AIST), Makoto Nagata (AIST/Kobe Univ.), Yuichi Hayashi (AIST/NAIST), Tsutomu Matsumoto (AIST/YNU)

(10) 17:15 - 17:40
(See Japanese page.)

# Information for speakers
General Talk will have 20 minutes for presentation and 5 minutes for discussion.

# CONFERENCE SPONSORS:
- This conference is co-sponsored by IEEE SSCS Japan Chapter and IEEE SSCS Kansai Chapter.

=== Technical Committee on Hardware Security (HWS) ===
# FUTURE SCHEDULE:

Fri, Dec 6, 2019: Asakusabashi Hulic Conference [Thu, Nov 28], Topics: Hardware Security Forum 2019

# SECRETARY:
Takatsugu Ono(Kyushu University), Hiroki Kunii(SECOM)
E-mail:hws-

=== Technical Committee on Integrated Circuits and Devices (ICD) ===
# FUTURE SCHEDULE:

Wed, Nov 13, 2019 - Fri, Nov 15, 2019: Ehime Prefecture Gender Equality Center [Wed, Sep 4], Topics: Design Gaia 2019 -New Field of VLSI Design-
Fri, Dec 13, 2019 - Sun, Dec 15, 2019: [Fri, Nov 8]

# SECRETARY:
Masatoshi Tsuge (Socionext)
E-mail: