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Technical Committee on VLSI Design Technologies (VLD)
Chair: Akihisa Yamada (Sharp) Vice Chair: Makoto Ikeda (Univ. of Tokyo)
Secretary: Takashi Takenaka (NEC), Shigetoshi Nakatake (Univ. of Kitakyushu)

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Technical Committee on Signal Processing (SIP)
Chair: Yasuji Ota (Fujitsu) Vice Chair: Hiroshi Sawada (NTT), Yoshinobu Kajikawa (Kansai Univ.)
Secretary: Takeshi Otani (Fujitsu Labs.), Keisuke Kinoshita (NTT)
Assistant: Takanobu Nishiura (Ritsumeikan Univ.)

===============================================
Technical Committee on Integrated Circuits and Devices (ICD)
Chair: Masahiko Yoshimoto (Kobe Univ.) Vice Chair: Takeshi Yamamura (Fujitsu Labs.)
Secretary: Toshimasa Matsuoka (Osaka Univ.), Ken Takeuchi (Chuo Univ.)
Assistant: Osamu Watanabe (Toshiba), Shinichi Ouchi (AIST), Akira Tsuchiya (Kyoto Univ.)

===============================================
Technical Committee on Image Engineering (IE)
Chair: Hirohisa Jozawa (NTT) Vice Chair: Toshiaki Fujii (Nagoya Univ.), Kazuhisa Iguchi (NHK)
Secretary: Sei Naito (KDDI R&D Labs.), Akira Kubota (Chuo Univ.)
Assistant: Takayuki Hamamoto (Tokyo Univ. of Science), Yukihiro Bandoh (NTT-AT)

===============================================
Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM)
Chair: Michiaki Muraoka
Secretary: Hiroaki Komatsu (Fujitsu), Naoki Iwata, Nozomu Togawa (Waseda Univ.)

DATE:
Thu, Oct 18, 2012 13:30 - 17:00
Fri, Oct 19, 2012 09:00 - 16:50

PLACE:
(岩手県立大学)

TOPICS:


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Thu, Oct 18 PM (13:30 - 14:45)
----------------------------------------

(1) 13:30 - 13:55
Human Behavior Detection Using Direction Change Invariant Features of Cubic Higher Order Local Auto Correlation
Takeyuki Ishii, Hitomi Murakami, Atsushi Koike (Seikei Univ.)

(2) 13:55 - 14:20
Avoiding Error Magnification in Weighted Median Cut Quantization in Decoding Process
-- High Quality Data Compression of Sparse Histogram Images --
Toru Ikarashi, Masahiro Iwahashi (Nagaoka Univ. of Tech.), Hitoshi Kiya (Tokyo Metropolitan Univ.)

(3) 14:20 - 14:45
A Design of Hilbert Transformers using an L1 error criterion
Ikuya Murakami, Naoyuki Aikawa (Tokyo Univ. of Science)

----- Break ( 15 min. ) -----

----------------------------------------
Thu, Oct 18 PM (15:00 - 15:50)
----------------------------------------

(4) 15:00 - 15:25
A 16-gray-scale image recognition on a dynamically reconfigurable vision architecture
Yuki Kamikubo, Minoru Watanabe, Shoji Kawahito (Shizuoka Univ.)

(5) 15:25 - 15:50
Learning of shade for beginners based on interactive pencil-drawing learning support system using tablet PC
Akihiro Sawada, Masashi Kameda (Iwate City Univ.)

----- Break ( 10 min. ) -----

----------------------------------------
Thu, Oct 18 PM (16:00 - 17:00)
----------------------------------------

(6) 16:00 - 17:00
[Invited Talk]
Computing Technologies for Human-Centered Real-World Intelligent Systems
Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.)

----------------------------------------
Fri, Oct 19 AM (09:00 - 10:40)
----------------------------------------

(7) 09:00 - 09:25
Power consumption analysis of a mono instruction set computer architecture
Hiroyuki Ito, Minoru Watanabe (Shizuoka Univ.)

(8) 09:25 - 09:50
Design of a Packet-Transfer-Based Dynamic Reconfigurable VLSI Processor for Reduction of a Configuration Memory Size
Yoshichika Fujioka (Hachinohe Inst. of Tech.), Michitaka Kameyama (Tohoku Univ.)

(9) 09:50 - 10:15
Design of Stochastic Flash A/D Converter using a non-linearity calibration technique
Shinya Yano, Hyunju Ham, Toshimasa Matsuoka, Jun Wang, Ikkyun Jo (Osaka Univ.)

(10) 10:15 - 10:40
A 9-bit 10MSps SAR ADC with Double Input Range for Supply Voltage
Gong Chen, Yu Zhang, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang, Jing Li (Design Algorithm Lab.)

----- Break ( 20 min. ) -----

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Fri, Oct 19 AM (11:00 - 12:00)
----------------------------------------

(11) 11:00 - 12:00
[Invited Talk]
Development of Heterogeneous Multi-Core SoC ViscontiTM2 for Image Recognition Applications
Takashi Miyamori, Yasuki Tanabe, Moriyasu Banno (Toshiba)

----- Break ( 60 min. ) -----

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Fri, Oct 19 PM (13:00 - 14:15)
----------------------------------------

(12) 13:00 - 13:25
Accelerator Architecture for Multi Scale Filter Operation
Shinya Ueno, Gauthier Lovic Eric, Koji Inoue, Kazuaki Murakami (Kyushu Univ.)

(13) 13:25 - 13:50
Load buffer with conversion capability from tiled data to raster data for motion search
Takumi Inomata, Atsushi Tachino, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo (Mie Univ.)

(14) 13:50 - 14:15
A Low Power CMOS Motion Estimation Processor Implementing Dynamic Voltage and Frequency Scaling (DVFS) and Adaptively Assigned Breaking-off Condition (A2BC) Motion Estimation Algorithm
Tadayoshi Enomoto, Nobuaki Kobayashi (Chuo Univ)

----- Break ( 15 min. ) -----

----------------------------------------
Fri, Oct 19 PM (14:30 - 15:45)
----------------------------------------

(15) 14:30 - 14:55
CMOS Op-amp Circuit Synthesis with Geometric Programming
Yu Zhang, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang, Jing Li (Design Algorithm Lab.)

(16) 14:55 - 15:20
Fast Estimation of Dynamic Delay Distribution
Dai Akita, Kenta Ando (Osaka Univ.), Atsushi Takahashi (Tokyo Tech.)

(17) 15:20 - 15:45
Reduction of array accesses with WAR dependencies
Takayuki Ookawa, Kenshu Seto (Tokyo City Univ.)

----- Break ( 15 min. ) -----

----------------------------------------
Fri, Oct 19 PM (16:00 - 16:50)
----------------------------------------

(18) 16:00 - 16:25
Secure Scan Architecture Using State Dependent Scan Flip-Flop with Key-Based Configuration on RSA Circuit  
Yuta Atobe, Youhua Shi, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.)

(19) 16:25 - 16:50
Write Reduction for Non-volatile Registers Using the Max-flow Min-cut Theorem
Yudai Itoi, Shinji Kimura (Waseda Univ.)

# Information for speakers
General Talk will have 20 minutes for presentation and 5 minutes for discussion.

# CONFERENCE SPONSORS:
- This conference is co-sponsored by IEEE Signal Processing Society Japan Chapter and IEEE SSCS Japan/Kansai Chapter.


=== Technical Committee on VLSI Design Technologies (VLD) ===
# FUTURE SCHEDULE:

Mon, Nov 26, 2012 - Wed, Nov 28, 2012: Centennial Hall Kyushu University School of Medicine [Fri, Sep 7], Topics: Design Gaia 2012 -New Field of VLSI Design-
Wed, Jan 16, 2013 - Thu, Jan 17, 2013: [Fri, Nov 2]

# SECRETARY:
Takeshi Takenaka (NEC)
E-mail: ajc
Tel: 044-431-7194

# ANNOUNCEMENT:
# See also VLD's homepage:
http://www.ieice.org/~vld/

=== Technical Committee on Signal Processing (SIP) ===
# FUTURE SCHEDULE:

Thu, Jan 31, 2013 - Fri, Feb 1, 2013: Viewport-Kure-Hotel (Kure) [Wed, Nov 14]

=== Technical Committee on Integrated Circuits and Devices (ICD) ===
# FUTURE SCHEDULE:

Mon, Nov 26, 2012 - Wed, Nov 28, 2012: Centennial Hall Kyushu University School of Medicine [Fri, Sep 7], Topics: Design Gaia 2012 -New Field of VLSI Design-
Thu, Dec 13, 2012 - Fri, Dec 14, 2012: University of Aizu [Thu, Oct 25], Topics: Silicon Analog RF
Mon, Dec 17, 2012 - Tue, Dec 18, 2012: Tokyo Tech Front [Fri, Oct 19]
Thu, Jan 31, 2013 - Fri, Feb 1, 2013: [Tue, Nov 13]

# SECRETARY:
Minoru Fujishima (The University of Tokyo)
TEL 03-5841-7425,FAX 03-5841-8575
E-mail:eetu-

=== Technical Committee on Image Engineering (IE) ===
# FUTURE SCHEDULE:

Thu, Nov 15, 2012 - Fri, Nov 16, 2012: Kagoshima Univ. [Mon, Sep 10]
Thu, Dec 6, 2012 - Fri, Dec 7, 2012: Fukuisi-chiiki-kouryu-plaza [Wed, Oct 17], Topics: Image Coding, Streaming, etc.
Jan, 2013: [unfixed]

# SECRETARY:
Akira Kubota (Chuo Univ.)
E-mail: ie-n2012

=== Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM) ===
# FUTURE SCHEDULE:

Mon, Nov 26, 2012 - Wed, Nov 28, 2012: Centennial Hall Kyushu University School of Medicine [Fri, Sep 7], Topics: Design Gaia 2012 -New Field of VLSI Design-
Wed, Jan 16, 2013 - Thu, Jan 17, 2013: [Fri, Nov 2]

# SECRETARY:
Nozomu Togawa (Waseda University)
Email sldm2012g


Last modified: 2012-10-08 10:31:50


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