IEICE Technical Committee Submission System
Advance Program
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top  Go Back   / [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


Technical Committee on Circuits and Systems (CAS) [schedule] [select]
Chair Hideaki Okazaki (Shonan Inst. of Tech.)
Vice Chair Taizo Yamawaki (Hitachi)
Secretary Toshihiro Tachibana (Shonan Inst. of Tech.), Yohei Nakamura (Hitachi)
Assistant Motoi Yamaguchi (Renesas Electronics)

Technical Committee on Integrated Circuits and Devices (ICD) [schedule] [select]
Chair Hideto Hidaka (Renesas)
Vice Chair Makoto Nagata (Kobe Univ.)
Secretary Takashi Hashimoto (Panasonic), Masanori Natsui (Tohoku Univ.)
Assistant Hiroyuki Ito (Tokyo Inst. of Tech.), Masatoshi Tsuge (Socionext), Tetsuya Hirose (Kobe Univ.)

Technical Committee on Computer Systems (CPSY) [schedule] [select]
Chair Koji Nakano (Hiroshima Univ.)
Vice Chair Hidetsugu Irie (Univ. of Tokyo), Takashi Miyoshi (Fujitsu)
Secretary Takeshi Ohkawa (Utsunomiya Univ.), Shinya Takameda (Hokkaido Univ.)
Assistant Yasuaki Ito (Hiroshima Univ.), Tomoaki Tsumura (Nagoya Inst. of Tech.)

Conference Date Fri, Dec 21, 2018 13:25 - 17:40
Sat, Dec 22, 2018 10:00 - 20:00
Sun, Dec 23, 2018 09:30 - 16:30
Topics  
Conference Place  
Transportation Guide http://www.atollemerald.jp/
Registration Fee This workshop will be held as the IEICE workshop in fully electronic publishing. Registration fee will be necessary except the speakers and participants other than the participants to workshop(s) in non-electronic publishing. See the registration fee page. We request the registration fee or presentation fee to participants who will attend the workshop(s) on ICD, CPSY, CAS.

Fri, Dec 21 PM 
13:25 - 17:40
(1) 13:25-13:30  
(2) 13:30-13:50 Power-amplifier-inserted Transversal Filter that Recovers Quantization Noise Power by CMOS Rectifier Yuto Tanaka, Yohtaro Umeda, Kyoya Takano (Tokyo University of Science)
(3) 13:50-14:10 Investigation of Design Method of Low-Power 64-QAM Transmitter Employing Backscattering Technique Kaede Miyauchi, Noboru Ishihara, Hiroyuki Ito (Titech)
(4) 14:10-14:30 DC Magnetic Field Based Localization with Single Anchor Coil Ryo Shirai, Pei Hao Chen, Ryohei Shimizu, Masanori Hashimoto (Osaka Univ.)
  14:30-14:45 Break ( 15 min. )
(5) 14:45-15:05 A High-Resolution Time-Based Resistance-to-Digital Converter with TDC and Counter Shuya Nakagawa, Kaito Horikoshi, Hiroki Ishikuro (Keio Univ.)
(6) 15:05-15:25 A Consideration of Method of Information Sources Terminals' Moving with Covering Problem on Epidemic Communication Mamoru Takano, Atsushi Kashiwabara, Hiroshi Tamura (Chuo Univ.), Keisuke Nakano (Niigata Univ.), Masakazu Sengoku (Graduate Institute for Entrepreneurial Studies)
(7) 15:25-15:45 Surveying Function of Tourism Assistance Apps in Fujisawa Area Toshihiro Tachibana, Hikaru Habuto, Shogo Tanaka, Tomohiro Chosa, Kei Watanabe, Takashi Satake (Shonan Inst. of Tech.)
  15:45-16:00 Break ( 15 min. )
(8) 16:00-16:20 Accelerating the Held-Karp Algorithm for the symmetric traveling salesman problem Kazuro Kimura, Shinya Higa, Masao Okita, Fumihiko Ino (Osaka Univ.)
(9) 16:20-16:40 Takuya Kojima, Hideharu Amano (Keio Univ.)
(10) 16:40-17:00 Developing the evaluation framework of the STRAIGHT architecture Akifumi Fukuda, Toru Koizumi, Junichiro Kadomoto, Satoshi Nakae, Hidetsugu Irie, Shuichi Sakai (UTokyo)
(11) 17:00-17:40  
Sat, Dec 22 AM 
10:00 - 20:00
(12) 10:00-17:00  
  17:00-18:00 Break ( 60 min. )
(13) 18:00-20:00  
Sun, Dec 23 AM 
09:30 - 12:00
(14) 09:30-10:00  
(15) 09:30-12:00 [Poster Presentation]
On a theorem for hexarotor flight controls
Kaito Isogai, Hideo Nakano, Hideaki Okazaki (Shonan Inst. Tech.)
(16) 09:30-12:00 [Poster Presentation]
A problem of finding the service function chain with minimum network resource usage and high fault tolerance
Daiki Yamada, Norihiko Shinomiya (Soka Univ)
(17) 09:30-12:00 [Poster Presentation]
Motion prediction using time-series data of geomagnetic sensor array
Ryohei Shimizu, Ryo Shirai, Pei Hao Chen, Masanori Hashimoto (Osaka Univ.)
(18) 09:30-12:00 [Poster Presentation]
On an properties of functions and learning of deep neural networks
Kazuya Ozawa, Toshihiro Tachibana, Hideo Nakano, Hideaki Okazaki (SIT)
(19) 09:30-12:00 [Poster Presentation]
A study for accurate motor modeling and calibration of electric vehicles
Kazuki Kuraya, Haruya Fujii, Lei Lin, Masahito Arima, Masahiro Fukui (Ritsumeikan Univ.)
(20) 09:30-12:00 [Poster Presentation]
A study of influences to lithium-ion battery module degradation by initial variation between cells by computational experiments.
Motoi Nakajima, Godine Raja Sekhar, Lei Lin, Masahito Arima, Masahiro Fukui (Ritsumeikan Univ.)
(21) 09:30-12:00 [Poster Presentation]
Design of VLIW processor for embedded applications based on RISC-V 16-bit ISA
Yusuke Mitani, Shunya Makino, Hiroaki Kaneko, Akinori Kanasugi (Tokyo Denki Univ.)
(22) 09:30-12:00 [Poster Presentation]
Development of a low-power processor based on RISC-V
Shunya Makino, Yusuke Mitani, Hiroaki Kaneko, Akinori Kanasugi (Tokyo Denki Univ.)
(23) 09:30-12:00 [Poster Presentation]
Matching network optimization for wideband millimeter wave CMOS amplifier
Shota Kohara, Shuhei Amakawa, Takeshi Yoshida, Minoru Fujishima (Hiroshima Univ.)
(24) 09:30-12:00 [Poster Presentation]
Proposal of security system using CMOS Image Sensor PUF
Shiori Inoue, Ryota Issiki, Shohei Takano, Masayosi Shirahata (Ritsumeikan Univ.), Shunsuke Okura (Brillnics Inc.), Mitsuru Shiozaki, Takaya Kubota (Ritsumeikan Univ.), Kenichiro Ishikawa, Isao Takayanagi (Brillnics Inc.), Takeshi Fujino (Ritsumeikan Univ.)
(25) 09:30-12:00 [Poster Presentation]
Evaluation of performance of 5GHz PLL with high-frequency injection pulses
Yuuki Kojima, Takao Kihara, Tsutomu Yoshimura (OIT)
(26) 09:30-12:00 [Poster Presentation]
Design of 140GHz Area-and-Power-Efficient VCO using Frequency Doubler
Yoshitaka Otsuki, Daisuke Yamazaki, Nguyen Ngoc Mai-Khanh, Tetsuya Iizuka (Tokyo Univ.)
(27) 09:30-12:00 [Poster Presentation]
Relaxation oscillation type sensor circuit using Slope Boost technology
Koki Miyamoto, Yusuke Imanaka, Noboru Ishihara, Hiroyuki Ito (Tokyo Tech)
(28) 09:30-12:00 [Poster Presentation]
Evaluation of jitter performance with external- and self-injection in PLL circuit
Tatsuya Okafuji, Kazuki Miyao, Takao Kihara, Tsutomu Yoshimura (OIT)
(29) 09:30-12:00 [Poster Presentation]
A Study on Cooperative Design Method of Low Power MEMS Oscillator
Yusuke Imanaka, Noboru Ishihara, Hiroyuki Ito (Tokyo Tech)
(30) 09:30-12:00 [Poster Presentation]
Transmission line design to shorten the line length
Tomohiro Kobayashi, Syuhei Amakawa, Takeshi Yoshida, Minoru Fujishima (Hiroshima Univ)
(31) 09:30-12:00 [Poster Presentation]
Evaluation of side-channel leakage in crypto modules with On-Chip-Monitor
Kazuki Monta, Hiroki Sonoda, Akihiro Tsukioka (Kobe Univ.), Takaaki Okidono (ECSEC), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.)
(32) 09:30-12:00 [Poster Presentation]
Efficiency Improvement for Power Amplifiers in RF Transceivers with Shared On-Chip Balun
Toshiki Murata, Takao Kihara, Tsutomu Yoshimura (OIT)
(33) 09:30-12:00 [Poster Presentation]
FPGA Implementation of Digital Transmitters with RF Pulse-width Modulation
Kazuto Yoshida, Takao Kihara, Tsutomu Yoshimura (OIT)
(34) 09:30-12:00 [Poster Presentation]
Digital Reduction of Third-Order Distortions in Time-Interleaved A/D Converters
Keisuke Miyakoshi, Takao Kihara, Tsutomu Yoshimura (OIT)
  12:00-13:00 Break ( 60 min. )
Sun, Dec 23 PM 
13:00 - 16:30
(35) 13:00-13:20 On Reward Sharing for Multi-agent Games Using Deep Reinforcement Learning Kei Watanabe, Toshihiro Tachibana (Shonan Isnt. of Tech.)
(36) 13:20-13:40 A Study on Input Method of Language in VR Shopping Mall Application Masayoshi Kawasaki, Toshihiro Tachibana, Kaya Nagasawa (Shonan Inst. of Tech.)
(37) 13:40-14:00
  14:00-14:15 Break ( 15 min. )
(38) 14:15-14:35 Sayaka Terashima, Takuya Kojima, Kazusa Musha, Hayate Okuhara, Hideharu Amano (Keio Univ.)
(39) 14:35-14:55 An approximation algorithm with LP rounding for an unsplittable flow edge load factor balancing problem in a flow network Hikaru Kasuga, Norihiko Shinomiya (Soka Univ.)
(40) 14:55-15:15 A proposal of information diffusion model using information vitality Yuya Ota, Norihiko Shinomiya (Soka Univ.)
  15:15-15:30 Break ( 15 min. )
(41) 15:30-15:50 Design of A 2.5kV Isolation 400Mbps Transformer-based Digital Isolator with High EMI Immunity for Power Electronics Environment Tsukasa Kagaya, Koutarou Miyazaki, Makoto Takamiya, Takayasu Sakurai (Tokyo Univ.)
(42) 15:50-16:10 Design Method of Near-fmax Amplifier Using Transmission Line Feedback Shingo Yasuda, Shuhei Amakawa (Hiroshima Univ.)
(43) 16:10-16:30 Comparison between Quadrature-modulation EPWM transmitters with a 90° and 180° hybrid in physical models Tomoaki Morita, Yohtraro Umeda (Tokyo Univ. of Science)

Announcement for Speakers
General TalkEach speech will have 15 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
CAS Technical Committee on Circuits and Systems (CAS)   [Latest Schedule]
Contact Address Toshihiro Tachibana (Shonan Institute of Technology)
TEL: 0466-30-0295
E--mail: bascsn-it 
ICD Technical Committee on Integrated Circuits and Devices (ICD)   [Latest Schedule]
Contact Address Takashi Hashimoto (Panasonic Corporation)
E--mail: 1967pac 
CPSY Technical Committee on Computer Systems (CPSY)   [Latest Schedule]
Contact Address Takashi Miyoshi (FUJITSU)
TEL +81-44-754-2931, FAX +81-44-754-2672
E--mail:

CPSY WEB
http://www.ieice.or.jp/iss/cpsy/jpn/ 


Last modified: 2018-12-14 12:13:47


Notification: Mail addresses are partially hidden against SPAM.

[Download Paper's Information (in Japanese)] <-- Press download button after click here.
 
[Cover and Index of IEICE Technical Report by Issue]
 

[Presentation and Participation FAQ] (in Japanese)
 

[Return to CAS Schedule Page]   /   [Return to ICD Schedule Page]   /   [Return to CPSY Schedule Page]   /  
 
 Go Top  Go Back   / [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan