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Technical Committee on Computer Systems (CPSY) (Searched in: 2014)
Search Results: Keywords 'from:2014-07-28 to:2014-07-28'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| CPSY, DC (Joint) |
2014-07-28 13:15 |
Niigata | Toki Messe, Niigata | An FPGA-based Graph Processing Accelerator with PyCoRAM Shinya Takamaeda-Yamazaki, Tadahiro Edamoto, Jun Yao, Yasuhiko Nakashima (NAIST)  CPSY2014-10 |
In order to improve the programmablity of FPGA-based accelerators with higher performance, we are developing PyCoRAM tha... [more] | CPSY2014-10 pp.1-6 |
| CPSY, DC (Joint) |
2014-07-28 13:40 |
Niigata | Toki Messe, Niigata | High Performance Graph Processing with a Memory Intensive Array Accelerator Ryo Shimizu, Shinya Takamaeda Yamazaki, Jun Yao, Yasuhiko Nakashima (NAIST) CPSY2014-11 |
A speedup technique incorporating a CGRA equipped with a local memory attached to each execution unit for accelerating t... [more] | CPSY2014-11 pp.7-12 |
| CPSY, DC (Joint) |
2014-07-28 14:05 |
Niigata | Toki Messe, Niigata | An Efficient Implementation of the Gradient-based Hough Transform using DSP slices and block RAMs on the FPGA Xin Zhou, Yasuaki Ito, Koji Nakano (Hiroshima Univ.) CPSY2014-12 |
[more] | CPSY2014-12 pp.13-18 |
| CPSY, DC (Joint) |
2014-07-28 17:00 |
Niigata | Toki Messe, Niigata | Performance Evaluation of Hadoop Applications in Hybrid Cloud Hayata Ohnaga (Tokyo Tech), Kento Aida (NII/Tokyo Tech), Omar Abdul-Rahman (NII) CPSY2014-13 |
In this paper, we present the performance evaluation results of Hadoop applications on hybrid clouds. We built three hyb... [more] | CPSY2014-13 pp.19-24 |
| CPSY, DC (Joint) |
2014-07-28 17:25 |
Niigata | Toki Messe, Niigata | Fast Evaluation Method based on Static Code Analysis for Programs Derived by the Iterative Optimization on the Polyhedral Model Tomoyuki Hosaka, Nobuhiko Sugino (Tokyo Inst. of Tech.) CPSY2014-14 |
For evaluation scheme in source code transformation, a fast evaluation method based on static code analysis is proposed.... [more] | CPSY2014-14 pp.25-30 |
| CPSY, DC (Joint) |
2014-07-28 17:50 |
Niigata | Toki Messe, Niigata | Auto Program Tuning for Improving Utilization of GPU Resources Ryo Takeshima, Tomoaki Tsumura (Nagoya Inst. of Tech.) CPSY2014-15 |
Utilizing a GPU to perform general purpose computation is called GPGPU. The high theoretical performance of GPU draws at... [more] | CPSY2014-15 pp.31-36 |
| CPSY, DC (Joint) |
2014-07-28 18:15 |
Niigata | Toki Messe, Niigata | Performance Evaluation of Speculative Parallel Processing Utilizing Hardware Transactional Memory on Commercial Multi-core CPU Yutaka Matsuno, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2014-16 |
Recently, it becomes essential to use parallel computation utilizing thread level parallelism as a method to utilize a s... [more] | CPSY2014-16 pp.37-42 |
| CPSY, DC (Joint) |
2014-07-29 09:00 |
Niigata | Toki Messe, Niigata | Verification Method of the Split Circuit by High-Level Synthesis Tool in a Circuit Partitioning mechanism Kazuya Matsuda (TAT), Takefumi Miyoshi (e-trees.Japan), Masashi Takemoto (TAT), Satoshi Funada (e-trees.Japan), Hironori Nakajo (TAT) CPSY2014-17 |
In recent years, a high-level synthesis tool has been attracted in designing hardware circuits instead of traditional HD... [more] | CPSY2014-17 pp.43-48 |
| CPSY, DC (Joint) |
2014-07-29 09:25 |
Niigata | Toki Messe, Niigata | Design and Performance Evaluation of a Manycore Processor for Large FPGA Haruka Mori, Kenji Kise (Tokyo Tech) CPSY2014-18 |
Due to the limitations of the single-threaded performance and the improvement of semiconductor technology, manycore pr... [more] |
CPSY2014-18 pp.49-54 |
| CPSY, DC (Joint) |
2014-07-29 09:50 |
Niigata | Toki Messe, Niigata | A Study of Accelerated Image Processing of Stabilizing Navigational Image by HW/SW Cooperative Processing on an FPGA Daichi Uetake, Takeshi Ohkawa (Utsunomiya Univ), Yohei Matsumoto (TUMSAT), Takashi Yokota, Kanemitsu Ootsu (Utsunomiya Univ) CPSY2014-19 |
Accidents on vessel traffic are mainly caused by human errors of insufficient watching. It is expected to realize auto w... [more] | CPSY2014-19 pp.55-60 |
| CPSY, DC (Joint) |
2014-07-29 10:45 |
Niigata | Toki Messe, Niigata | Interconnect Design for Low Latency, High Topological Embeddability and Partitioning Capability by Supplementary Optical Circuit Switches Ryuta Kawano (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII) CPSY2014-20 |
This paper focuses on how to efficiently run multiple small parallel applications in a single High-performance computing... [more] | CPSY2014-20 pp.61-66 |
| CPSY, DC (Joint) |
2014-07-29 11:10 |
Niigata | Toki Messe, Niigata | TCP Protocol for 40Gbps Data Transfer Fukumasa Morifuji, Kei Hiraki (Univ. of Tokyo) CPSY2014-21 |
Due to advance in technology, the performance of computer and the amount of data to be processed is increasing. High per... [more] | CPSY2014-21 pp.67-72 |
| CPSY, DC (Joint) |
2014-07-29 11:35 |
Niigata | Toki Messe, Niigata | Alterable uniform and random NoC through rewiring Seiichi Tade, Ryuta Kawano, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) CPSY2014-22 |
Recently, the number of cores inside a chip has been increased. Network-on-Chip(NoC) is widely utilized for communicatio... [more] | CPSY2014-22 pp.73-78 |
| CPSY, DC (Joint) |
2014-07-29 13:30 |
Niigata | Toki Messe, Niigata | Parallel Algorithms for the Summed Area Table on the Asynchronous Hierarchical Memory Machine, with GPU implementations Akihiko Kasagi, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2014-23 |
The main contribution of this paper is to introduce the asynchronous Hierarchical Memory Machine (asynchronous HMM), w... [more] |
CPSY2014-23 pp.79-84 |
| CPSY, DC (Joint) |
2014-07-29 13:55 |
Niigata | Toki Messe, Niigata | Cache Scheme Optimized to Access Behavior of Flash SSDs Shugo Ogawa (NEC) CPSY2014-24 |
[more] | CPSY2014-24 pp.85-90 |
| CPSY, DC (Joint) |
2014-07-29 14:20 |
Niigata | Toki Messe, Niigata | Middlewares Utilizing The Characteristics of Resource Disaggregated Architecture Masaki Kan, Jun Suzuki, Yuki Hayashi, Takashi Yoshikawa, Shinya Miyakawa (NEC) CPSY2014-25 |
Server vendors have proposed an new Server Architecture, called Resource Disaggregated Architecture. We forecast that s... [more] | CPSY2014-25 pp.91-96 |
| CPSY, DC (Joint) |
2014-07-29 15:15 |
Niigata | Toki Messe, Niigata | A preminarily evaluation on primitive data transfer performance of PEACH3 Hideharu Amano, Takuya Kuhara (Keio Univ.), Toshihiro Hanawa (Univ. of Tokyo), Yuetsu Kodama, Taisuke Boku (Univ. of Tsukuba) CPSY2014-26 |
[more] | CPSY2014-26 pp.97-102 |
| CPSY, DC (Joint) |
2014-07-29 15:40 |
Niigata | Toki Messe, Niigata | Consideration of 2D-FFT by Decomposition of Large Scale Data on Multi-GPU Hiroaki Miyata, BoazJessie Jackin, Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota, Yoshio Hayasaki, Toyohiko Yatagai, Takanobu Baba (Utsunomiya Univ.) CPSY2014-27 |
Acceleration for Fast Fourier Transform (FFT) of large computation is an important issue. Until today, acceleration fo... [more] |
CPSY2014-27 pp.103-108 |
| CPSY, DC (Joint) |
2014-07-29 16:05 |
Niigata | Toki Messe, Niigata | Matrix Multiplication Library for Computation Acceralator with Limited Own Memory Size Kiyotaka Atsumi (KA-LAB) CPSY2014-28 |
Recent researches of algorithms with calculation accelerators mainly use 1 device or 2 or more same devices. It changed... [more] |
CPSY2014-28 pp.109-112 |
| CPSY, DC (Joint) |
2014-07-29 15:15 |
Niigata | Toki Messe, Niigata | Performance Analysis of The Lustre on Small-Scale Cluster Takeshi Fukunaga, Kei Hiraki (Univ. of Tokyo) DC2014-18 |
The Lustre file system is one of the most used distributed filesystem in a wide range of fields. As a reason for that t... [more] |
DC2014-18 pp.1-8 |
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