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Technical Committee on Superconductive Electronics (SCE)  (Searched in: 2019)

Search Results: Keywords 'from:2020-01-16 to:2020-01-16'
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Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 1 - 20 of 46  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] High-Throughput Gate-Level-Pipelined SFQ Multipliers
Ikki Nagaoka, Masamitsu Tanaka, Kyosuke Sano, Taro Yamashita (Nagoya Univ.), Koji Inoue (Kyushu Univ.), Akira Fujimaki (Nagoya Univ.) SCE2019-30		  [more] SCE2019-30
pp.1-4
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Design of Datapath for 8-bit Parallel SFQ Microprocessors with Gate-Level Pipelines
Ryota Kashima, Ikki Nagaoka, Masamitsu Tanaka, Kyosuke Sano, Taro Yamashita, Akira Fujimaki (Nagoya Univ.) SCE2019-31		  [more] SCE2019-31
pp.5-9
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Design of SFQ convolutional computation processor for convolutional neural network
Fei Ke (Yokohama Natl. Univ.), Ao Ren, Yanzhi Wang (Northeastern Univ.), Olivia Chen, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-32		  [more] SCE2019-32
pp.11-13
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Design and Simulation of Single-Flux-Quantum Multiply-Accumulator
Zongyuan Li, Yuki Yamanashi, Nobuyuki Yoshikawa (YNU) SCE2019-33		 Multiply accumulate is a special operation in digital signal processor or some microprocessors. The hardware circuit uni... [more] SCE2019-33
pp.15-18
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Design and Evaluation of Superconducting 2-bit Autocorrelator System for Astronomical Data Analysis
Lisa Shirakawa, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-34		 We designed and evaluated the performances of an single-flux-quantum (SFQ) autocorrelator that supports 2-bit signal inp... [more] SCE2019-34
pp.19-21
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] A Routing Method with Wire Length Matching for RSFQ Logic Circuits Using Thin PTLs
Kei Kitamura (Kyoto Univ), Kazuyoshi Takagi (Mie Univ), Naofumi Takagi (Kyoto Univ) SCE2019-35		 A routing method with wire length matching using thin PTLs for RSFQ circuits is proposed. For AIST-ADP2 fabrication tech... [more] SCE2019-35
pp.23-25
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] A Comparison of Clocking Schemes for SFQ Circuits
Takahiro Kawaguchi (Kyoto Univ.), Kazuyoshi Takagi (Mie Univ.), Takagi Naofumi (Kyoto Univ.) SCE2019-36		  [more] SCE2019-36
pp.27-32
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Demonstration of an SFQ 8-symbol complex event detector corresponding to regular expressions
Kazuma Akizuki, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Natl Univ.) SCE2019-37		  [more] SCE2019-37
pp.33-35
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Simulation and Comparison of the Energy Efficiency of Half Flux Quantum Circuits
Feng Li, Yuto Takeshita, Daiki Hasegawa, Kyosuke Sano, Masamitsu Tanaka, Taro Yamashita, Akira Fujimaki (Nagoya Univ.) SCE2019-38		  [more] SCE2019-38
pp.37-40
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Demonstration of SQUIDs with a Period of Half Flux Quantum in Modulation Patterns for Half Flux Quantum Circuits
Yuto Takeshita, Feng Li, Daiki Hasegawa, Kyosuke Sano, Masamitsu Tanaka, Taro Yamashita, Akira Fujimaki (Nagoya Univ.) SCE2019-39		  [more] SCE2019-39
pp.41-43
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Fabrication of Magnetic Josephson Junctions on Nb 4-layer Structure for Large Scale Half Flux Quantum Circuits
Daiki Hasegawa, Yuto Takeshita, Feng Li, Kyosuke Sano, Masamitsu Tanaka, Taro Yamashita, Akira Fujimaki (Nagoya Univ.) SCE2019-40		  [more] SCE2019-40
pp.45-48
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Investigation of Dual-Rail Single-Flux-Quantum Circuit Using π Josephson Junction
Yusuke Kobara, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Nati. Univ.) SCE2019-41		  [more] SCE2019-41
pp.49-51
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Design and evaluation of single flux quantum circuits by using local magnetic flux bias technique
Shunta Asada, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-42		 We developed a local magnetic flux bias (LFB) technique to introduce a phase shift in the superconducting circuit. The L... [more] SCE2019-42
pp.53-56
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Design of single flux quantum highly-integrated memory cell and its application to lookup table
Takuya Hosoya, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-43		 This study focuses on a look-up table (LUT) based on a single flux quantum (SFQ) logic circuit. To realize highly-integr... [more] SCE2019-43
pp.57-60
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Improved Maximum Output Voltage of Double-Flux-Quantum Amplifier Fabricated Using 10-kA/cm2 Nb integration process
Yuta Somei, Kouki Yamazaki, Hiroshi Shimada, Yoshinao Mizugaki (UEC Tokyo) SCE2019-44		  [more] SCE2019-44
pp.61-63
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Design and operation of single-flux-quantum logic gates with a floating storage loop
Koki Yamazaki, Hiroshi Shimada, Yoshinao Mizugaki (UEC Tokyo) SCE2019-45		  [more] SCE2019-45
pp.65-68
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Energy Efficient Microwave Switch Using Single-Flux-Quantum Circuits with Controllable Microwave Power
Shiori Michibayashi, Naoki Takeuchi, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-46		  [more] SCE2019-46
pp.69-71
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Optimization of a Josephson latching driver using 10-kA/cm2 Nb process for a Josephson-CMOS hybrid memory
Yuki Hironaka, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-47		 Josephson digital circuits such as single flux quantum circuits have a great potential for future high-end computing sys... [more] SCE2019-47
pp.73-74
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Investigation of Timing Design by Using Low-Power SFQ Shift Registers
Manami Kuniyoshi, Ken Murase, Ikki Nagaoka, Kyosuke Sano, Masamitsu Tanaka, Taro Yamashita, Akira Fujimaki (Nagoya Univ) SCE2019-48		  [more] SCE2019-48
pp.75-78
SCE 2020-01-17
13:15		 Kanagawa   [Poster Presentation] Study of low power consumption of adiabatic pass transistor decoder for Josephson-CMOS Hybrid Memories
Yu Okamoto, Yuki Hironaka, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-49		 In recent years, superconducting circuits have attracted attention because of the limitation of CMOS circuit technology.... [more] SCE2019-49
pp.79-81
 Results 1 - 20 of 46  /  [Next]  
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