| IEICE Technical Committee Submission System Conference Schedule |
Online Proceedings [Sign in] Tech. Rep. Archives |
Technical Committee on Silicon Device and Materials (SDM) (Searched in: 2011)
Search Results: Keywords 'from:2012-03-05 to:2012-03-05'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| SDM | 2012-03-05 10:05 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Keynote Address]
Development of Ultra Low Voltage Devices utilizing BEOL Process Shin'ichiro Kimura (LEAP)  SDM2011-176 |
Resistive-change non-volatile devices, in which variable resistance materials are embedded during Back-end of Line proce... [more] | SDM2011-176 pp.1-5 |
| SDM | 2012-03-05 10:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Basic Performance of a Logic-IP Compatible eDRAM with Cylinder Capacitors in Low-k/Cu BEOL Layers Ippei Kume, Naoya Inoue, Ken'ichiro Hijioka, Jun Kawahara, Koichi Takeda, Naoya Furutake, Hiroki Shirai, Kenya Kazama, Shin'ichi Kuwabara, Msasatoshi Watarai, Takashi Sakoh, Toshifumi Takahashi, Takashi Ogura, Toshiji Taiji, Yoshiko Kasama (Renesas Electronics) SDM2011-177 |
We have confirmed the basic performance of a Logic-IP compatible (LIC) eDRAM with cylinder capacitors in the low-k/Cu BE... [more] | SDM2011-177 pp.7-11 |
| SDM | 2012-03-05 11:20 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Highly Reliable BEOL-Transistor with oxygen-controlled InGaZnO channel and Gate/Drain Offset design Kishou Kaneko, Naoya Inoue, Shinobu Saito, Naoya Furutake, Hiroshi Sunamura, Jun Kawahara, Masami Hane, Yoshihiro Hayashi (Renesas Electronics) SDM2011-178 |
Reliability of BEOL-transistors with a wide-gap oxide semiconductor InGaZnO film for high-voltage interface, integrated ... [more] | SDM2011-178 pp.13-17 |
| SDM | 2012-03-05 13:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Initial Growth Observation of Multilayer Graphene on SiO2/Si substrate using Raman Spectroscopy and XPS Yoshihiro Ojiro, Shuichi Ogawa (Tohoku Univ.), Manabu Inukai (JASRI), Motonobu Sato (AIST), Eiji Ikenaga, Takayuki Muro (JASRI), Mizuhisa Nihei (AIST), Yuji Takakuwa (Tohoku Univ.), Naoki Yokoyama (AIST) SDM2011-179 |
The photoemission-assisted Plasma enhanced CVD is the one of the most possible method to grow graphene in the low temper... [more] | SDM2011-179 pp.19-24 |
| SDM | 2012-03-05 13:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Single-layered barrier/liner Co(W) by ALD/CVD for next generation ULSI-Cu interconnect Hideharu Shimizu (Taiyo Nippon Sanso/Tokyo Univ.), Kohei Shima, Takeshi Momose (Tokyo Univ.), Yoshihiko Kobayashi (Taiyo Nippon Sanso), Yukihiro Shimogaki (Tokyo Univ.) SDM2011-180 |
The effective resistivity of interconnects are predicted to be increased by ULSI shrinking. Barrier/liner layer formed o... [more] | SDM2011-180 pp.25-29 |
| SDM | 2012-03-05 14:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Evaluation of additives effects in copper electroplating solution by rapid exchange using microfluidic reactor Takeyasu Saito, Yutaka Miyamoto, Sunao Hattori, Naoki Okamoto, Kazuo Kondo (Osaka Prefecture Univ.) SDM2011-181 |
The adsorption behaviour of additives during copper electrodeposition was investigated by the microfluidic reactor. We ... [more] | SDM2011-181 pp.31-35 |
| SDM | 2012-03-05 14:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Formation of conformal barrier layer by electroless plating for TSV of 3D-LSI Ryohei Arima, Hiroshi Miyake, Fumihiro Inoue, Tomohiro Shimizu, Shoso Shingubara (Kansai Univ.) SDM2011-182 |
Conformal deposition of barrier metal layer in a high aspect ratio TSV using electroless plating with precious metal nan... [more] | SDM2011-182 pp.37-40 |
| SDM | 2012-03-05 15:25 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Influence of Via Stress on Surface Micro-roughness-induced Leakage Current in Through-Silicon Via Interconnects Hideki Kitada (Univ. of Tokyo/Fujitsu Lab.), Nobuhide Maeda, Koji Fujimoto, Shoichi Kodama, Young Suk Kim (Univ. of Tokyo), Yoriko Mizushima (Univ. of Tokyo/Fujitsu Lab.), Tomoji Nakamura (Fujitsu Lab.), Takayuki Ohba (Univ. of Tokyo) SDM2011-183 |
[more] | SDM2011-183 pp.41-46 |
| SDM | 2012-03-05 15:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Characterization of Local Strain around Through Silicon Via Interconnect in Wafer-on-wafer Structures Osamu Nakatsuka (Nagoya Univ.), Hideki Kitada, Young Suk Kim (Univ. of Tokyo), Yoriko Mizushima, Tomoji Nakamura (Fujitsu Lab.), Takayuki Ohba (Univ. of Tokyo), Shigeaki Zaima (Nagoya Univ.) SDM2011-184 |
We have investigated the local strain structure in a thinned Si layer stacked on Si substrate for wafer-on-a-wafer appli... [more] | SDM2011-184 pp.47-52 |
[Return to Top Page]