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Technical Committee on VLSI Design Technologies (VLD)  (2022 - )

Chair: Minako Ikeda (NTT) Vice Chair: Shigetoshi Nakatake (Univ. of Kitakyushu)
Secretary: Makoto Miyamura (NBS), Masashi Imai (Hirosaki Univ.)
Assistant: Takuma Nishimoto (Hitachi)

[Go to Official VLD Homepage (Japanese)] 
 Schedule  (Sort by: Date Ascending)
 Results 1 - 2 of 2  /   
Date Place Topics Joint Deadline Select Menu
Mon, Nov 28, 2022
- Wed, Nov 30
Kanazawa Bunka Hall
(Primary: On-site, Secondary: Online)
Design Gaia 2022 -New Field of VLSI Design- VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] [Fri, Sep 9]
  • Detailed Info.
       (Japanese)
  • Regist. Closed
  • Adv. Program
  • Registration Fee 
  • Mon, Jan 23, 2023
    - Tue, Jan 24
    Raiosha, Hiyoshi Campus, Keio University
    (Primary: On-site, Secondary: Online)
    FPGA Applications, etc. IPSJ-SLDM, RECONF, VLD [detail] [Mon, Nov 14]
  • Detailed Info.
  • Regist. Closed
  • Adv. Program
  • Registration Fee 
  •  Results 1 - 2 of 2  /   


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