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Technical Committee on VLSI Design Technologies (VLD) (Searched in: 2008)
Search Results: Keywords 'from:2008-06-26 to:2008-06-26'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, CAS, SIP | 2008-06-26 09:00 |
Hokkaido | Hokkaido Univ. | Adaptive Feedback Canceller System for Sinusoidal Signals and Its Analysis Hideaki Sakai, Hayato Fukuzono (Kyoto Univ.)  CAS2008-1 VLD2008-14 SIP2008-35 |
In this paper, adaptive feedback canceller is analyzed for a sum of complex sinusoidal signals and white nose, and a... [more] |
CAS2008-1 VLD2008-14 SIP2008-35 pp.1-6 |
| VLD, CAS, SIP | 2008-06-26 09:20 |
Hokkaido | Hokkaido Univ. | On F0 contour Estimation Based on Robust Time-Varying Complex Speech Analysis Keiichi Funaki (Univ. of the Ryukyus) CAS2008-2 VLD2008-15 SIP2008-36 |
We have already proposed robust $F_0$ estimation algorithm based on complex AR speech analysis for analytic speech sig... [more] |
CAS2008-2 VLD2008-15 SIP2008-36 pp.7-12 |
| VLD, CAS, SIP | 2008-06-26 09:40 |
Hokkaido | Hokkaido Univ. | Direct LSP Estimation Using Rucursive Gauss-Newton Method with a Tapered Window Gyo Sato, Takefumi Kitayama, Atsushi Nakagaki, Koji Shibata (Kitami Inst. of Tech..) CAS2008-3 VLD2008-16 SIP2008-37 |
The LSP is one of the most important feature parameters of speech based on the LPC. An adaptive LSP estimation method u... [more] |
CAS2008-3 VLD2008-16 SIP2008-37 pp.13-16 |
| VLD, CAS, SIP | 2008-06-26 10:00 |
Hokkaido | Hokkaido Univ. | Incremental Adaptive Filtering Over Distributed Networks Using Parallel Projection Onto Hyperslabs Noriyuki Takahashi, Isao Yamada (Tokyo Inst. of Tech.) CAS2008-4 VLD2008-17 SIP2008-38 |
This paper presents adaptive incremental algorithms using the metric projections onto closed hyperslabs for adaptive est... [more] | CAS2008-4 VLD2008-17 SIP2008-38 pp.17-22 |
| VLD, CAS, SIP | 2008-06-26 10:35 |
Hokkaido | Hokkaido Univ. | Progressive Bitplane Coding for Lossless Image Compression Kunio Funahashi, Hisakazu Kikuchi, Shogo Muramatsu (Niigata Univ.) CAS2008-5 VLD2008-18 SIP2008-39 |
A lossless compression system for digital images is proposed to equip itself with two functions of progressive transmiss... [more] | CAS2008-5 VLD2008-18 SIP2008-39 pp.23-28 |
| VLD, CAS, SIP | 2008-06-26 10:55 |
Hokkaido | Hokkaido Univ. | Traking of Periodontal Bacteria in Phase-Contrast Microscopic Video Keita Shimizu, Hisakazu Kikuchi, Shogo Muramatsu (Niigata Univ.) CAS2008-6 VLD2008-19 SIP2008-40 |
The latest research shows that 80 percents of the Japanese adult are infected by a periodontal disease. The pathologica... [more] |
CAS2008-6 VLD2008-19 SIP2008-40 pp.29-32 |
| VLD, CAS, SIP | 2008-06-26 11:15 |
Hokkaido | Hokkaido Univ. | Phase Scrambled Image and Its Application to Image Matching Izumi Ito, Hitoshi Kiya (Tokyo Metropolitan Univ) CAS2008-7 VLD2008-20 SIP2008-41 |
We propose a phase-scrambled image and an image matching method between phase-scrambled images. This scrambling distorts... [more] | CAS2008-7 VLD2008-20 SIP2008-41 pp.33-38 |
| VLD, CAS, SIP | 2008-06-26 11:35 |
Hokkaido | Hokkaido Univ. | Image Matching Based on Phase Information of Intensity Gradient Binary Images Eisuke Nakamura, Izumi Ito, Hitoshi Kiya (Tokyo Metropolitan Univ) CAS2008-8 VLD2008-21 SIP2008-42 |
We consider an image matching method based on the phase information of intensity gradient binary images. The intensity g... [more] | CAS2008-8 VLD2008-21 SIP2008-42 pp.39-43 |
| VLD, CAS, SIP | 2008-06-26 13:10 |
Hokkaido | Hokkaido Univ. | A C-based Design for the first pass of Speech Recognition Akihiko Eguchi (Kinki Univ.), Makoto Saituji (NECエレクトロニクス), Joe Hashimoto, Takashi Kambe (Kinki Univ.) CAS2008-9 VLD2008-22 SIP2008-43 |
It is critical to speed up the first pass process of the large vocabulary speech recognition for real time operation of ... [more] | CAS2008-9 VLD2008-22 SIP2008-43 pp.45-50 |
| VLD, CAS, SIP | 2008-06-26 13:30 |
Hokkaido | Hokkaido Univ. | A Hierarchical Pipeline Circuit Design for Real-time Particle Tracking System Takashi Kambe (Kinki Univ.), Kouji Sakai (Mazda Motor), Hirokazu Uetsu (DENSO), Tomotaro Ueshima (Kinki Univ.) CAS2008-10 VLD2008-23 SIP2008-44 |
The architecture design phase is one of the most important steps in the System LSI development. We propose a C-based hi... [more] |
CAS2008-10 VLD2008-23 SIP2008-44 pp.51-56 |
| VLD, CAS, SIP | 2008-06-26 13:50 |
Hokkaido | Hokkaido Univ. | Evaluation of Dynamically Reconfigurable Processor in Implementing Sequential Execution of Image Processing Ryosuke Watanabe, Koki Abe (UEC) CAS2008-11 VLD2008-24 SIP2008-45 |
Recently, image applications are frequently executed using mobile devises, where executions with high speed at low cost ... [more] | CAS2008-11 VLD2008-24 SIP2008-45 pp.57-62 |
| VLD, CAS, SIP | 2008-06-26 14:10 |
Hokkaido | Hokkaido Univ. | Hardware of QR decomposition
-- The adaptation example to the MUSIC method of QR decomposition -- Akiyoshi Oguro, Yoshiyuki Mimoto (TJ) CAS2008-12 VLD2008-25 SIP2008-46 |
One of the Eigenvalue decomposition techniques of a Hermitian matrix is QR decomposition. There are Householder transfor... [more] | CAS2008-12 VLD2008-25 SIP2008-46 pp.63-68 |
| VLD, CAS, SIP | 2008-06-26 14:45 |
Hokkaido | Hokkaido Univ. | A study for performance modeling of circuits using MTCMOS power gating Yusuke Hikosaka, Yuichiro Tachikawa, Junki Miyajima, Masahiro Fukui (Ritsumeikan Univ.) CAS2008-13 VLD2008-26 SIP2008-47 |
In the processes before the 90 nm generation, most of the power is consumed by the dynamic power which is consumed by th... [more] | CAS2008-13 VLD2008-26 SIP2008-47 pp.69-74 |
| VLD, CAS, SIP | 2008-06-26 15:05 |
Hokkaido | Hokkaido Univ. | An Experimental Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability Koichi Hamamoto, Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye (Osaka Univ.) CAS2008-14 VLD2008-27 SIP2008-48 |
Body-biasing is expected to be a common design technique, then area efficient implementation in layout has been demanded... [more] | CAS2008-14 VLD2008-27 SIP2008-48 pp.75-79 |
| VLD, CAS, SIP | 2008-06-26 15:25 |
Hokkaido | Hokkaido Univ. | Power Supply Chip for CCD in Ultra-High-Speed Camera Based on 1.2um CMOS/SOI Process with High Breakdown Voltage Masatoshi Kobayashi, Toshiro Akino (Kinki Univ.), Kenji Nishi (Kinki Univ. Tech. of Collage), Kousei Takehara, Takeharu Etoh (Kinki Univ.) CAS2008-15 VLD2008-28 SIP2008-49 |
[more] | CAS2008-15 VLD2008-28 SIP2008-49 pp.81-86 |
| VLD, CAS, SIP | 2008-06-26 15:45 |
Hokkaido | Hokkaido Univ. | A Lateral Unified-CBiCMOS Buffer Circuit for High Speed and Low Energy Based on 0.18μm CMOS/SOI Process Takashi Hamahata, Satoshi Uto, Toshiro Akino (Kinki Univ.), Kenji Nishi (Kinki Univ. Tech of Collage), Kousei Takehara, Takeharu Etoh (Kinki Univ.) CAS2008-16 VLD2008-29 SIP2008-50 |
In this paper, we develop a printed circuit board having a discrete device that can drive a CCD chip with 5 nF maximum l... [more] | CAS2008-16 VLD2008-29 SIP2008-50 pp.87-92 |
| VLD, CAS, SIP | 2008-06-26 16:20 |
Hokkaido | Hokkaido Univ. | [Invited Talk]
On LSI Design of the a Next Generation High Throughput MIMO-OFDM Wireless Communication Systems Yoshikazu Miyanaga, Shingo Yoshizawa (Hokkaido Univ.) CAS2008-17 VLD2008-30 SIP2008-51 |
In this report, the standardization of high throughput wireless LAN, i.e., IEEE 802.11n, is first introduced and then th... [more] | CAS2008-17 VLD2008-30 SIP2008-51 pp.93-98 |
| VLD, CAS, SIP | 2008-06-26 17:10 |
Hokkaido | Hokkaido Univ. | [Fellow Memorial Lecture]
A Consideration on Usage of CAD toolsfocused on
-- From Timing Analysis -- Shuji Tsukiyama (Chuo University) CAS2008-18 VLD2008-31 SIP2008-52 |
The design of integrated circuits consists of several phases, and for each phase, various Computer-Aided Design (CAD) to... [more] | CAS2008-18 VLD2008-31 SIP2008-52 pp.99-102 |
| VLD, CAS, SIP | 2008-06-27 09:00 |
Hokkaido | Hokkaido Univ. | Customizable Hardware/Software Evaluation Method Using Simple High-level Synthesis Chongyang Zhang (Waseda Univ.), Toshiro Isomura, Yu Suzuki (Toyota Motor Corp.), Shinji Kimura (Waseda Univ.) CAS2008-19 VLD2008-32 SIP2008-53 |
In hardware/software codesign, the functional description of an information system is optimized as a mixture of software... [more] | CAS2008-19 VLD2008-32 SIP2008-53 pp.1-6 |
| VLD, CAS, SIP | 2008-06-27 09:20 |
Hokkaido | Hokkaido Univ. | Safe Clocking Minimum Register Assignment in High-Level Synthesis Keisuke Inoue, Mineo Kaneko, Tsuyoshi Iwagaki (JAIST) CAS2008-20 VLD2008-33 SIP2008-54 |
For recent and future nanometer-technology VLSIs, static and dynamic delay variations become a serious problem. In man... [more] |
CAS2008-20 VLD2008-33 SIP2008-54 pp.7-12 |
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