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| Chair |
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MIchitaka Kameyama |
| Vice Chair |
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Masao Nakaya |
| Secretary |
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Kunio Uchiyama, Shinji Miyano |
| Assistant |
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Masanori Hariyama, Koji Kai |
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| Conference Date |
Thu, May 26, 2005 10:00 - 17:20
Fri, May 27, 2005 10:00 - 17:10 |
| Topics |
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| Conference Place |
KOBE Universary Centennial Hall |
| Address |
1-1, Rokkodai, Nada-ku Kobe 657-8501 Japan |
| Transportation Guide |
About 15-20 min. from Hankyu Railway "Rokko" Station by walk
http://www.kobe-u.ac.jp/en/info/access/rokko/index.htm |
Contact
Person |
Prof. Masahiko Yoshimoto
078-881-1212（大代表） |
Thu, May 26 AM
10:00 - 17:20 |
| (1) |
10:00-10:30 |
A Low-power Systolic Array Architecture for Block-matching Motion Estimation |
Junichi Miyakoshi, Yuichiro Murachi (Kobe Univ.), Koji Hamano, Tetsuro Matsuno, Masayuki Miyama, Masahiko Yoshimoto (Kanazawa Univ.) |
| (2) |
10:30-11:00 |
A Single-Chip Multi-Processor integrating Quadruple Processors on 90nm CMOS Process |
Ken-ichi Kawasaki, Tetsuyoshi Shiota, Yukihito Kawabe, Wataru Shibamoto, Atsushi Sato, Tetsutaro Hashimoto, Motoaki Matsumura, Hiroshi Okano, Fumihiko Hayakawa, Shinichiro Tago, Yasuki Nakamura (Fujitsu Labs.), Hideo Miyake (FLT), Atsuhiro Suga, Hiromasa Takahashi, Atsuki Inoue (Fujitsu Labs.) |
| (3) |
11:00-11:30 |
An H.264/MPEG-4 Audio/Visual Codec LSI with Module-Wise Dynamic Voltage/Frequency Scaling |
Yoshiyuki Kitasho, Toshihide Fujiyoshi, Shinichiro Shiratake, Tsuyoshi Nishikawa, Mototsugu Hamada, Hiroyuki Hara, Tetsuya Fujita, Fumitoshi Hatori, Takayoshi Shimazawa, Masami Murakata, Fumihiro Minami, Naoyuki Kawabe, Takeshi Kitahara, Masafumi Takahashi, Yukihito Oowaki (TOSHIBA) |
| (4) |
11:30-12:00 |
A Sheet-Type Scanner Based on a 3D Stacked Organic-Transistor Circuit with Double Word-line and Double Bit-line Structure |
Hiroshi Kawaguchi, Shingo Iba, Yusaku Kato, Tsuyoshi Sekitani, Takao Someya, Takayasu Sakurai (Univ. of Tokyo) |
| |
12:00-13:00 |
Lunch ( 60 min. ) |
| (5) |
13:00-13:30 |
A Loop-Bandwidth Calibration System for Fractional-N Synthesizer and ΔΣ PLL Transmitter |
Yukinori Akamine, Manabu Kawabe, Kazuyuki Hori, Takao Okazaki (Hitachi), Nigel Tolson (RTE), Masumi Kasahara (Renesas), Satoshi Tanaka (Hitachi) |
| (6) |
13:30-14:00 |
A 1.2V 3.5mW Delta-Sigma Modulator with a Passive Current Summing Network and a Variable Gain Function |
Toshiaki Nagai, Hiroyuki Satou, Hiroshi Yamazaki, Yuu Watanabe (Fujitsu Ltd.) |
| (7) |
14:00-14:30 |
A CMOS Rotary Encoder System Based on Magnetic Pattern Analysis with a Resolution of 10b per Rotation |
Kazuhiro Nakano (Shizuoka Univ.), Toru Takahashi, Yoshitaka Nagano (NTN), Shoji Kawahito (Shizuoka Univ.) |
| (8) |
14:30-15:00 |
A 19.5b Wide Dynamic Range CMOS Image Sensor with 12b Column-Parallel Cyclic A/D Converters |
Masaaki Sasaki (Sendai National College of Tech.), Mitsuhito Mase (Shizuoka Univ.), Shoji Kawahito (Research Institute of Elec., Shizuoka Univ.), Yasuo Wakamori (Yamaha) |
| |
15:00-15:20 |
Break ( 20 min. ) |
| (9) |
15:20-17:20 |
Panel Discussion |
Fri, May 27 AM
10:00 - 17:10 |
| (10) |
10:00-10:30 |
A 10-Gb/s Burst-Mode CDR IC in 0.13-um CMOS |
Masafumi Nogawa, Kazuyoshi Nishimura, Shunji Kimura, Tomoaki Yoshida, Tomoaki Kawamura, Minoru Togashi, Kiyomi Kumozaki, Yusuke Ohtomo (NTT) |
| (11) |
10:30-11:00 |
1.25Gb/s Burst-Mode Receiver ICs with Quick Response for PON systems |
Makoto Nakamura, Yuhki Imai, Yohtaro Umeda, Jun Endo, Yuji Akatsu (NTT) |
| (12) |
11:00-11:30 |
12Gb/s duobinary signaling with x2 oversampled edge equalization |
Kouichi Yamaguchi, Kazuhisa Sunaga, Shunichi Kaeriyama, Takaaki Nedachi, Makoto Takamiya, Koichi Nose, Yoshihiro Nakagawa (NEC), Mitsutoshi Sugawara (NEC-EL America), Muneo Fukaishi (NEC) |
| (13) |
11:30-12:00 |
A 950MHz Rectifier Circuit for Sensor Networks with 10m Distance |
Toshiyuki Umeda, Hiroshi Yoshida, Shuichi Sekine, Yumi Fujita, Takuji Suzuki, Shoji Otaka (TOSHIBA) |
| |
12:00-13:00 |
Lunch ( 60 min. ) |
| (14) |
13:00-13:30 |
A Single-Chip Si-LDMOS Power Amplifier for GSM |
Toshihiko Shimizu, Yoshikuni Matsunaga, Satoshi Sakurai (Renesas), Isao Yoshida (ATN), Masao Hotta (Musashi Inst. of Tech.) |
| (15) |
13:30-14:00 |
Integrated stereo sigma-delta class D amplifier |
Eric Gaalaas (ADI), Bill Liu, Naoaki Nishimura (ADKK) |
| (16) |
14:00-14:30 |
A 0.18um 102dB-SNR Mixed CT SC Audio-Band delta-sigma ADC |
Paul Morrow, Maria Chamarro, Colin Lyden, Pablo Ventura (Analog Devices), Andrew Abo (Telegent Systems), Atsushi Matamura, Mike-D Keane, Richard O'Brien, Niall McGuinness, Paschal Minogue, Martin McGranaghan, Johan Mansson, Ivan Ryan (Analog Devices) |
| (17) |
14:30-15:00 |
Spread-Spectrum Clock Generator for Serial ATA using Fractional PLL controlled by Delta-Sigma Modulator with Level Shifter |
Takashi Kawamoto, Masaru Kokubo, Takashi Oshima (Hitachi Ltd), Takayuki Noto, Masato Suzuki, Shigeyuki Suzuki, Takashi Hayasaka, Tomoaki Takahashi, Jun Kasai (Renesas Technology Corp.) |
| |
15:00-15:10 |
Break ( 10 min. ) |
| (18) |
15:10-15:40 |
A 195Gb/s 1.2W 3D-Stacked Inductive Inter-Chip Wireless Superconnect with Transmit Power Control Scheme |
Noriyuki Miura, Daisuke Mizoguchi, Mari Inoue (Keio Univ.), Takayasu Sakurai (Univ. of Tokyo), Tadahiro Kuroda (Keio Univ.) |
| (19) |
15:40-16:10 |
A 3D-Integration Scheme Utilizing Wireless Interconnections for Implementing Hyper Brains |
Atsushi Iwata, Mamoru Sasaki, Takamaro Kikkawa, Seiji Kameda, Hiroshi Ando, Kentaro Kimoto, Daisuke Arizono, Hideo Sunami (Hiroshima Univ.) |
| (20) |
16:10-16:40 |
A Programmable On-Chip Picosecond Jitter Measurement Circuit without a Reference Clock |
Kiyotaka Ichiyama, Masahiro Ishida, Takahiro Yamaguchi (Advantest Labs.), Mani Soma (Univ. of Washington), Masakatsu Suda, Toshiyuki Okayasu, Daisuke Watanabe, Kazuhiro Yamamoto (Advantest) |
| (21) |
16:40-17:10 |
Substrate Integrity Beyond 1GHz |
Mitsuya Fukazawa, Makoto Nagata (Kobe Univ.), Naoyuki Hamanishi, Masazumi Shiochi, Tetsuya Iida (Toshiba Corp.), Junichiro Watanabe (Toshiba Information Systems(Japan) Corp.), Yoshitaka Murasaka, Atsushi Iwata (A-R-Tec Corp.) |
| Announcement for Speakers |
| General Talk | Each speech will have 25 minutes for presentation and 5 minutes for discussion. |
| Contact Address and Latest Schedule Information |
| ICD |
Technical Committee on Integrated Circuits and Devices (ICD) [Latest Schedule]
|
| Contact Address |
Kunio Uchiyama (Hitachi)
TEL +81-42-323-1111 (etx. 3701), FAX +81-42-327-7737
E- : u    crl   
Tsunaaki Shidei（Oki）
TEL +81-426-62-6111 (etx.2014), FAX +81-426-62-0603
E-:  dei552o  |
Last modified: 2005-05-17 18:53:10
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