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Technical Committee on Circuits and Systems (CAS) [schedule] [select]
Chair Hiroki Sato (Sony LSI Design)
Vice Chair Yoshinobu Maeda (Niigata Univ.)
Secretary Shinji Shimoda (Sony LSI Design), Nao Ito (NIT, Toyama college)
Assistant Motoi Yamaguchi (TECHNOPRO), Yohei Nakamura (Hitachi), Takahide Sato (Univ. of Yamanashi), Yasutoshi Aibara (Murata Manufacturing)

Technical Committee on VLSI Design Technologies (VLD) [schedule] [select]
Chair Kazutoshi Kobayashi (Kyoto Inst. of Tech.)
Vice Chair Minako Ikeda (NTT)
Secretary Daisuke Kanemoto (Osaka Univ.), Makoto Miyamura (NEC)

Technical Committee on Signal Processing (SIP) [schedule] [select]
Chair Yukihiro Bandou (NTT)
Vice Chair Toshihisa Tanaka (Tokyo Univ. Agri.&Tech.), Takayuki Nakachi (Ryukyu Univ.)
Secretary Kenjiro Sugimoto (Xiaomi), Osamu Watanabe (Takushoku Univ.), Yuichi Tanaka (Tokyo Univ. Agri.&Tech.)
Assistant Taichi Yoshida (UEC), Seisuke Kyochi (Univ. of Kitakyushu)

Technical Committee on Mathematical Systems Science and its Applications (MSS) [schedule] [select]
Chair Atsuo Ozaki (Osaka Inst. of Tech.)
Vice Chair Shingo Yamaguchi (Yamaguchi Univ.)
Secretary Koichi Kobayashi (Hokkaido Univ.), Jianquan Liui (NEC)
Assistant Masato Shirai (Shimane Univ.)

Conference Date Mon, Jul 5, 2021 10:50 - 16:50
Tue, Jul 6, 2021 10:00 - 14:20
Conference Place  
Sponsors This conference is co-sponsored by IEEE Signal Processing Society Tokyo Joint Chapter. This conference is technical co-sponsored by IEEE Circuits and Systems Society Japan Chapter(IEEE CASS JC).
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Registration Fee This workshop will be held as the IEICE workshop in fully electronic publishing. Registration fee will be necessary except the speakers and participants other than the participants to workshop(s) in non-electronic publishing. See the registration fee page. We request the registration fee or presentation fee to participants who will attend the workshop(s) on SIP, CAS, VLD, MSS.

Mon, Jul 5 AM 
Chair: Mahfuzul ISLAM
10:50 - 11:40
(1) 10:50-11:15 Extremely high resolution time-frequency analysis of switching noise CAS2021-1 VLD2021-1 SIP2021-11 MSS2021-1 Fumihiko Ishiyama (NTT)
(2) 11:15-11:40 A Consideration on Physical Properties of Electromagnetic Waves Expressed by Circuit Theory
-- Reciprocity Enables Losslessness and Resonance to Stand Together --
CAS2021-2 VLD2021-2 SIP2021-12 MSS2021-2
Nobuo Nagai (Hokkaido Univ.), Hirofumi Sanada (HUS), Takashi Yahagi (RISP)
  11:40-13:00 Break ( 80 min. )
Mon, Jul 5 PM 
13:00 - 13:25
(3) 13:00-13:25 Epileptic Spike Detection from Electroencephalogram with Self-Attention Mechanism CAS2021-3 VLD2021-3 SIP2021-13 MSS2021-3 Kosuke Fukumori (TUAT), Noboru Yoshida, Hidenori Sugano, Madoka Nakajima (Juntendo Univ.), Toshihisa Tanaka (TUAT)
  13:25-13:30 Break ( 5 min. )
Mon, Jul 5 PM 
13:30 - 15:00
(4) 13:30-15:00 [Panel Discussion]
[Panel Discussion] The Role of System and Signal Processing Subsociety
-- Challenge to IoT (Internet of Things) issues --
CAS2021-4 VLD2021-4 SIP2021-14 MSS2021-4
Hideaki Okazaki (SIT), Hiroki Sato (SONY), Kazutoshi Kobayashi (KIT), Atsuo Ozaki (OIT), Kazunori Hayashi (KU), Toshihisa Tanaka (TUAT)
  15:00-15:10 Break ( 10 min. )
Mon, Jul 5 PM 
15:10 - 16:50
(5) 15:10-15:35 Group and Concept
-- Fulfillment Conditions and Operability --
CAS2021-5 VLD2021-5 SIP2021-15 MSS2021-5
Kumon Tokumaru (Writer)
(6) 15:35-16:00 The quantitative strength evaluation method for European professional basketball teams CAS2021-6 VLD2021-6 SIP2021-16 MSS2021-6 Koji Sugie (Meijo Univ.), Eiji Konaka (Meijo Univ)
(7) 16:00-16:25 Analysis of the impact of incentive-type demand spons on consumer power saving behavior CAS2021-7 VLD2021-7 SIP2021-17 MSS2021-7 Kiyosi Suzumoto, Norihiko Sinomiya (Souka Univ)
(8) 16:25-16:50 Thermal Comfort Aware Real-time Co-scheduling of HVAC, Battery System, and Smart Appliances for Smart Building CAS2021-8 VLD2021-8 SIP2021-18 MSS2021-8 Daichi Watari, Ittetsu Taniguchi (Osaka Univ.), Francky Catthoor (IMEC/KUL), Charalampos Marantos (NTUA), Kostas Siozios (AUTH), Elham Shirazi (IMEC/KUL), Dimitrios Soudris (NTUA), Takao Onoye (Osaka Univ.)
Tue, Jul 6 AM 
10:00 - 10:50
(9) 10:00-10:25 Circuit Structure of PUF using Leakage Current and Simulation Evaluation CAS2021-9 VLD2021-9 SIP2021-19 MSS2021-9 Tomoaki Oikawa, Kimiyoshi Usami (Shibaura Inst. of Tech.)
(10) 10:25-10:50 A Method of Layout Pattern Classification with Creating Representative Clip CAS2021-10 VLD2021-10 SIP2021-20 MSS2021-10 Tomoya Masutani, Shuhei Ishino, Kunihiro Fujiyoshi (TUAT)
Tue, Jul 6 AM 
10:50 - 12:30
(11) 10:50-11:15 Online Pickup and Delivery Problem under Temporal Logic Constraints CAS2021-11 VLD2021-11 SIP2021-21 MSS2021-11 koki kanashima, Toshimitu Ushio (Osaka Univ.)
(12) 11:15-11:40 Pinning Stabilization of Probabilistic Boolean Networks Using Reinforcement Learning CAS2021-12 VLD2021-12 SIP2021-22 MSS2021-12 Michiaki Takizawa, Koichi Kobayashi, Yuh Yamashita (Hokkaido Univ.)
(13) 11:40-12:05 Visitor Route Planning in An Amusement Park Using Counting Temporal Logic CAS2021-13 VLD2021-13 SIP2021-23 MSS2021-13 Kotaro Nagae, Toshimitsu Ushio (Osaka Univ.)
(14) 12:05-12:30 Sensor Scheduling-Based Detection of False Data Injection Attacks in Power System State Estimation CAS2021-14 VLD2021-14 SIP2021-24 MSS2021-14 Sho Obata, Koichi Kobayashi, Yuh Yamashita (Hokkaido Univ.)
Tue, Jul 6 PM 
13:30 - 14:20
(15) 13:30-13:55 System Analysis of Intelligence
-- The Maturation and Networking of B Lymphocytes in the ventricle system --
CAS2021-15 VLD2021-15 SIP2021-25 MSS2021-15
Kumon Tokumaru (Writer)
(16) 13:55-14:20 A Study on AM-AM/PM Characteristics and Distortion of Power Amplifiers for Mobile Phone Terminals CAS2021-16 VLD2021-16 SIP2021-26 MSS2021-16 Satoshi Tanaka (Murata Manufacturing)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
CAS Technical Committee on Circuits and Systems (CAS)   [Latest Schedule]
Contact Address Shinji Shimoda(Sony LSI Design Inc)
TEL +81-50-3140-0964
E--mail: SnSny 
VLD Technical Committee on VLSI Design Technologies (VLD)   [Latest Schedule]
Contact Address Daisuke KANEMOTO (Osaka University)
E--mail: deeieng-u 
Announcement See also VLD's homepage:
SIP Technical Committee on Signal Processing (SIP)   [Latest Schedule]
Contact Address IEICE Technical Group on Signal Processing
Email: sip-n 
MSS Technical Committee on Mathematical Systems Science and its Applications (MSS)   [Latest Schedule]
Contact Address Koichi Kobayashi (Hokkaido University)
Tel: +81-11-706-6452
E--mail: k-bassiisti 

Last modified: 2021-06-29 16:26:54

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