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Technical Committee on Computer Systems (CPSY) [schedule] [select]
Chair Yasuhiko Nakashima (NAIST)
Vice Chair Koji Nakano (Hiroshima Univ.), Hidetsugu Irie (Univ. of Tokyo)
Secretary Takashi Miyoshi (Fujitsu Labs.), Michihiro Koibuchi (NII)
Assistant Takeshi Ohkawa (Utsunomiya Univ.), Shinya Takameda (NAIST)

Special Interest Group on System Architecture (IPSJ-ARC) [schedule] [select]

Conference Date Thu, Oct 6, 2016 10:00 - 17:00
Topics Emerging Computer Systems Exhibition 
Conference Place Meeting Room 104, International Conference Hall 
Address 2-1, Nakase, Mihama-ku, Chiba-city, 261-0023 Japan
Transportation Guide 5 minutes walk from JR Kaihin Makuhari station
http://www.m-messe.co.jp/en/access/index.html
Contact
Person
Hidetsugu Irie, Graduate School of Information Science and Technology, the University of Tokyo
+81-3-5841-6752
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Thu, Oct 6 AM  Poster and Demonstration Session
10:00 - 16:00
(1)
CPSY
10:00-16:00 CPSY2016-41
(2)
CPSY
10:00-16:00 [Poster Presentation]
Proposal on intuitive text interface using depth camera CPSY2016-42
Hidenobu Doi, Hidetsugu Irie, Shuichi Sakai (UTokyo)
(3)
CPSY
10:00-16:00 [Poster Presentation]
Multi-Processor System Design with Secure Processors CPSY2016-43
Takuya Kajiwara, Mizuki Miyanaga, Hidetsugu Irie, Shuichi Sakai (UTokyo)
(4)
CPSY
10:00-16:00 [Poster Presentation]
CPSY2016-44
Keigo Teramoto, Yoshiki Ebisuhama, Atsushi Kubota, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.)
(5)
CPSY
10:00-16:00 [Poster Presentation]
A GPU Implementation of Eigenvalue Computation for a Large Number of Matrices CPSY2016-45
Hiroki Tokura, Takumi Honda, Yasuaki Ito, Koji Nakano, Mitsuya Nishino, Yushiro Hirota, Masami Saeki (Hiroshima Univ.)
(6)
CPSY
10:00-16:00 [Poster Presentation]
A Loss-Less Data Compression Algorithm for GPUs CPSY2016-46
Shunji Funasaka, Koji Nakano, Yasuaki Ito (Hiroshima Univ.)
(7)
CPSY
10:00-16:00 CPSY2016-47
(8)
CPSY
10:00-16:00 CPSY2016-48
(9)
CPSY
10:00-16:00 [Poster Presentation]
Processing Aggregation Queries using Interconnected Multiple FPGA Boards CPSY2016-49
Kawahara Naoto, Masato Yoshimi, Chelimuge WU, Tsutomu Yoshinaga (UEC)
(10)
CPSY
10:00-16:00 [Poster Presentation]
CPSY2016-50
Yuki Sawada, Kouta Shigenobu, Hiroki Sugiyama, Kanemitsu Ootsu, Takashi Yokota, Takeshi Ohkawa (Utsunomiya Univ.)
(11)
CPSY
10:00-16:00 [Technology Exhibit]
Security technologies for non-volatile memory in IoT devices
-- Mechanisms for on-chip MCU and off-chip memory system --
CPSY2016-51
Mikio Hashimoto, Yoshiyuki Amanuma, Kentaro Umesawa, Ryuichi Koike, Jun Kanai, Naoko Yamada (Toshiba)
(12) 10:00-16:00  
(13) 10:00-16:00  
(14) 10:00-16:00  
Thu, Oct 6 PM  Awarding ceremony
16:30 - 17:00
(15) 16:30-17:00  

Contact Address and Latest Schedule Information
CPSY Technical Committee on Computer Systems (CPSY)   [Latest Schedule]
Contact Address Hidetsugu Irie (the University of Tokyo)
TEL +81-3-5841-6788
E--mail: iemtltu-

CPSY WEB
http://www.ieice.or.jp/iss/cpsy/jpn/ 
IPSJ-ARC Special Interest Group on System Architecture (IPSJ-ARC)   [Latest Schedule]
Contact Address  


Last modified: 2016-09-06 14:52:13


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