IEICE Technical Committee Submission System
Advance Program
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top  Go Back   Prev SCE Conf / Next SCE Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


Technical Committee on Superconductive Electronics (SCE) [schedule] [select]
Chair Akira Fujimaki (Nagoya Univ.)
Secretary Hiroyuki Akaike (Nagoya Univ.), Hiroyuki Shibata (NTT)
Assistant Hiroaki Myoren (Saitama Univ.)

Conference Date Thu, Jul 22, 2010 09:30 - 14:55
Topics Signal processing technologies and their applications, etc. 
Conference Place Kikaishinkou-kaikan 
Address 3-5-8, Shibakouen, Minato-ku, Tokyo, 105-0011 Japan.
Transportation Guide 10 minutes walk from Kamiya-cho station of Metro Hibiya-line
https://www.ieice.org/jpn/about/syozai.html
Contact
Person
Nagoya Univ. Hiroyuki Akaike
+81-52-789-3324
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Thu, Jul 22 AM 
09:30 - 12:00
(1) 09:30-09:55 Design of semi-synchronous error correction circuit for superconducting flash type ADC SCE2010-14 Kazumasa Ishihara (Tokyo Denki Univ./ISTEC), Hideo Suzuki (ISTEC), Kazunori Miyahara (Tokyo Denki Univ.), Mutsuo Hidaka (ISTEC)
(2) 09:55-10:20 High-Speed Operation of Single Flux Quantum Logic Up/Down Counter for Digital DROS SCE2010-15 Kosuke Terui, Yun Kimimoto, Tohru Taino, Hiroaki Myoren (Saitama Univ.)
(3) 10:20-10:45 An Integrated Cryogenic Current Comparator SCE2010-16 Michitaka Maruyama, Chiharu Urano, Takehiko Oe, Masaaki Maezawa, Takahiro Yamada (AIST), Mutsuo Hidaka, Tetsuro Satoh, Shuichi Nagasawa, Kenji Hinode (ISTEC), Nobu-hisa Kaneko (AIST)
(4) 10:45-11:10 High-Speed Test of a Radix-2 Butterfly Processing Element for the Fast Fourier Transform using SFQ Circuits SCE2010-17 Fumishige Miyaoka, Toshiki Kainuma, Yasuhiro Shimamura, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.)
(5) 11:10-11:35 Development of circuit design and evaluation environments for superconductor devices SCE2010-18 Takahiro Yamada, Masaaki Maezawa, Satoshi Kohjiro (AIST)
(6) 11:35-12:00 Fault Modeling and Test Generation for Single Flux Quantum Logic Circuits SCE2010-19 Nobutaka Kito (Kyoto Univ.), Masamitsu Tanaka, Kazuyoshi Takagi (Nagoya Univ.), Naofumi Takagi (Kyoto Univ.)
Thu, Jul 22 PM 
13:15 - 14:55
(7) 13:15-13:40 Investigation to Speed Up Single-flux-quantum Circuits by Applying Higher Bias Voltage SCE2010-20 Masamitsu Tanaka, Hiroyuki Akaike, Akira Fujimaki, Kazuyoshi Takagi (Nagoya Univ./JST), Nobuyuki Yoshikawa (Yokohama National Univ./JST), Shuichi Nagasawa (SRL/JST), Naofumi Takagi (Kyoto Univ./JST)
(8) 13:40-14:05 Demonstration of a 4x4 SFQ switch fabricated with the ISTEC 10-kA/cm2 Nb Advanced process 2 SCE2010-21 Masato Ito, Irina Kataeva, Masakazu Okada, Tomohito Kouketsu, Masamitsu Tanaka, Hiroyuki Akaike, Akira Fujimaki (Nagoya Univ.)
(9) 14:05-14:30 50 GHz Tests of SFQ Floating-Point Multipliers Using 10 kA/cm2 Nb Advanced Process SCE2010-22 Yasuhiro Shimamura, Toshiki Kainuma, Fumishige Miyaoka, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.), Akira Fujimaki, Kazuyoshi Takagi (Nagoya Univ.), Naofumi Takagi (Kyoto Univ.)
(10) 14:30-14:55 Operations of Single Flux Quantum Circuits Based on 40-kA/cm^2 Process SCE2010-23 Tomohito Kouketsu, Hiroyuki Akaike, Akira Fujimaki (Nagoya Univ.), Tetsuro Satoh, Kenji Hinode, Shuichi Nagasawa, Mutsuo Hidaka (SRL)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
SCE Technical Committee on Superconductive Electronics (SCE)   [Latest Schedule]
Contact Address Hiroyuki Akaike (Nagoya Univ.)
TEL: +81-52-789-3324, FAX: +81-52-789-3160
email: aiee-u 


Last modified: 2010-05-20 15:04:56


Notification: Mail addresses are partially hidden against SPAM.

[Download Paper's Information (in Japanese)] <-- Press download button after click here.
 
[Cover and Index of IEICE Technical Report by Issue]
 

[Presentation and Participation FAQ] (in Japanese)
 

[Return to SCE Schedule Page]   /  
 
 Go Top  Go Back   Prev SCE Conf / Next SCE Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan