Thu, Apr 22 AM  Lower SRAM and DRAM 09:00 - 12:30
(1)	09:00-09:50	[Invited Talk] A Configurable SRAM with Constant-Negative-Level Write Buffer for Low Voltage Operation with 0.149μm2 Cell in 32nm High-k Metal Gate CMOS ICD2010-1	Yuki Fujimura, Osamu Hirabayashi, Takahiko Sasaki, Azuma Suzuki, Atsushi Kawasumi, Yasuhisa Takeyama, Keiichi Kushida, Gou Fukano, Akira Katayama, Yusuke Niki, Tomoaki Yabe (Toshiba Corp.)
(2)	09:50-10:40	[Invited Talk] Challenging for an ultra low-voltage SRAM by innovative design circuits and device technologies -- A 0.5V 100MHz PD-SOI SRAM using Asymmetric MOSFET and Forward Body Bias -- ICD2010-2	Koji Nii, Makoto Yabuuchi, Yasumasa Tsukamoto, Yuuichi Hirano, Toshiaki Iwamatsu, Yuji Kihara (Renesas Electronics)
	10:40-10:50	Break ( 10 min. )
(3)	10:50-11:15	A 45nm 0.6V Cross-Point 8T SRAM with Negative Biased Read/Write Assist ICD2010-3	Makoto Yabuuchi, Koji Nii, Yasumasa Tsukamoto, Yasunobu Nakase, Hirofumi Shinohara (Renesas Electronics)
(4)	11:15-11:40	A 40-nm Low-power SRAM with Multi-stage Replica-Bitline Scheme for Reducing Timing Variation ICD2010-4	Shigenobu Komatsu, Masanao Yamaoka (HITACHI), Masao Morimoto, Noriaki Maeda, Yasuhisa Shimazaki (Renesas Technology Corp.), Kenichi Osada (HITACHI)
(5)	11:40-12:05	32% Lower Active Power, 42% Lower Leakage Current Ferroelectric 6T-SRAM with VTH Self-Adjusting Function for 60% Larger Static Noise Margin (SNM) ICD2010-5	Shuhei Tanakamaru, Teruyoshi Hatanaka, Ryoji Yajima (Univ. of Tokyo), Mitsue Takahashi, Shigeki Sakai (AIST), Ken Takeuchi (Univ. of Tokyo)
(6)	12:05-12:30	Low-VT CMOS Preamplifier for 0.5-V Gigabit-DRAM Arrays ICD2010-6	Akira Kotabe, Yoshimitsu Yanagawa, Satoru Akiyama, Tomonori Sekiguchi (Hitachi)
	12:30-13:30	Lunch Break ( 60 min. )
Thu, Apr 22 PM  New Materials 13:30 - 17:50
(7)	13:30-14:20	[Invited Talk] A 64Mbit MRAM with Clamped-Reference and Adequate-Reference Schemes ICD2010-7	Kenji Tsuchida, Tsuneo Inaba, Katsuyuki Fujita, Yoshihiro Ueda, Takafumi Shimizu, Yoshiaki Asao, Takeshi Kajiyama, Masayoshi Iwayama, Sumio Ikegawa, Tatsuya Kishi, Tadashi Kai, Minoru Amano, Naoharu Shimomura, Hiroaki Yoda, Yohji Watanabe (TOSHIBA)
(8)	14:20-15:10	[Invited Talk] Overview of Chain FeRAM Technology and Scalable Shield-Bitline-Overdrive Technique ICD2010-8	Daisaburo Takashima, Hidehiro Shiga, Daisuke Hashimoto, Tadashi Miyakawa, Tohru Ozaki, Hiroyuki Kanaya, Susumu Shuto, Koji Yamakawa, Iwao Kunishima (Toshiba)
	15:10-15:20	Break ( 10 min. )
(9)	15:20-15:45	Fabrication of a Nonvolatile Lookup-Table Circuit Chip Using Magneto/Semiconductor-Hybrid Structure for an Immediate-Power-Up Field Programmable Gate Array ICD2010-9	Daisuke Suzuki, Masanori Natsui, Shoji Ikeda (Tohoku Univ.), Haruhiro Hasegawa, Katsuya Miura, Jun Hayakawa (ARL, Hitachi, Ltd.), Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu (Tohoku Univ.)
(10)	15:45-16:10	A 32-Mb SPRAM with localized bi-directional write driver, '1'/'0' dual-array equalized reference scheme, and 2T1R memory cell layout ICD2010-10	Riichiro Takemura, Takayuki Kawahara, Katsuya Miura, Hiroyuki Yamamoto, Jun Hayakawa, Nozomu Matsuzaki, Kazuo Ono, Michihiko Yamanouchi, Kenchi Ito, Hiromasa Takahashi (Hitachi), Shoji Ikeda (Tohoku Univ.), Haruhiro Hasegawa, Hideyuki Matsuoka (Hitachi), Hideo Ohno (Tohoku Univ.)
	16:10-16:20	Break ( 10 min. )
(11)	16:20-17:50
Fri, Apr 23 AM  Flash Momory 09:30 - 11:10
(12)	09:30-09:55	Ferroelectric (Fe)-NAND Flash Memory with Non-volatile Page Buffer for Data Center Application Enterprise Solid-State Drives (SSD) ICD2010-11	Teruyoshi Hatanaka, Ryoji Yajima (Univ. of Tokyo), Takeshi Horiuchi, Shouyu Wang, Xizhen Zhang, Mitsue Takahashi, Shigeki Sakai (AIST), Ken Takeuchi (Univ. of Tokyo)
(13)	09:55-10:20	Multi-stacked 1G cell/layer Pipe-shaped BiCS Flash Memory ICD2010-12	Takashi Maeda, Kiyotaro Itagaki, Tomoo Hishida, Ryota Katsumata, Masaru Kito, Yoshiaki Fukuzumi, Masaru Kido, Hiroyasu Tanaka, Yosuke Komori, Megumi Ishiduki, Junya Matsunami, Tomoko Fujiwara, Hideaki Aochi, Yoshihisa Iwata, Yohji Watanabe (Toshiba)
(14)	10:20-10:45	Design Technology of stacked NAND FeRAM ICD2010-13	Koichi Sugano, Shigeyoshi Watanabe (Shonan Inst. of Tech.)
(15)	10:45-11:10	Study of stacked NOR type MRAM ICD2010-14	Shouto Tamai, Shigeyoshi Watanabe (sit)
	11:10-11:25	Break ( 15 min. )
Fri, Apr 23 AM  11:25 - 12:15
(16)	11:25-12:15	[Invited Talk] High-Speed Memory Interfaces -- DDR/GDDR-DRAM -- ICD2010-15	Yasuhiro Takai (Elpida)
	12:15-13:45	Lunch Break ( 90 min. )
Fri, Apr 23 PM  Contactless Interface 13:45 - 16:30
(17)	13:45-14:35	[Invited Talk] Non-contact Chip-to-Chip Interfaces for 3D System Integration ICD2010-16	Hiroki Ishikuro, Tadahiro Kuroda (Keio Univ.)
(18)	14:35-15:00	A 2.5Gb/s/ch 4PAM Inductive-Coupling Transceiver for Non-Contact Memory Card ICD2010-17	Yasuhiro Take, Shusuke Kawai, Hiroki Ishikuro, Tadahiro Kuroda (Keio Univ.)
	15:00-15:15	Break ( 15 min. )
(19)	15:15-15:40	An 8Tb/s 1pJ/b 0.8mm2/Tb/s QDR Inductive-Coupling Interface Between 65nm CMOS GPU and 0.1um DRAM ICD2010-18	Noriyuki Miura, Kazutaka Kasuga, Mitsuko Saito, Tadahiro Kuroda (Keio Univ.)
(20)	15:40-16:05	A 2Gb/s 1.8pJ/b/chip Inductive-Coupling Through-Chip Bus for 128-Die NAND-Flash Memory Stacking ICD2010-19	Mitsuko Saito, Noriyuki Miura, Tadahiro Kuroda (Keio Univ.)
(21)	16:05-16:30	[依頼講演]Digital Rosetta Stone: A Sealed Permanent Memory with Inductive-Coupling Power and Data Link ICD2010-20	Yuxiang Yuan, Noriyuki Miura (Keio Univ.), Shigeki Imai (Sharp), Hiroyuki Ochi (Kyoto Univ.), Tadahiro Kuroda (Keio Univ.)

Contact Address and Latest Schedule Information
ICD	Technical Committee on Integrated Circuits and Devices (ICD)   [Latest Schedule]
	Contact Address	Suzuki, Hiroaki (Renesas) TEL 072-787-2335 E-:as

Last modified: 2010-04-08 19:19:35