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Technical Committee on Dependable Computing (DC) [schedule] [select]
Chair Seiji Kajihara (Kyushu Inst. of Tech.)
Vice Chair Nobuyasu Kanekawa (Hitachi)
Secretary Tomohiro Nakamura (Hitachi), Tatsuhiro Tsuthiya (Osaka Univ.)

Conference Date Wed, Feb 13, 2013 10:00 - 17:05
Topics VLSI Design and Test, etc. 
Conference Place  
Transportation Guide http://www.jspmi.or.jp/about/access.html
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Wed, Feb 13 AM 
10:00 - 10:50
(1) 10:00-10:25 A Hardware Implementation of a SAT Solver for Test Generation with Solution Reuse DC2012-80 Toshiya Mukai, Kenji Ueda, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.)
(2) 10:25-10:50 Accelerating techniques for SAT-based test pattern generation DC2012-81 Yusuke Matsunaga (Kyushu Univ.)
  10:50-11:10 Break ( 20 min. )
Wed, Feb 13 AM 
11:10 - 12:00
(3) 11:10-11:35 Note on Fault Coverage Estimation Using Critical Area Analysis DC2012-82 Yoshihiro Shimizu, Yuta Nakayama, Masayuki Arai, Kazuhiko Iwasaki (Tokyo Metro. Univ.)
(4) 11:35-12:00 A don't care filling method to improve defect detection capability using stuck-at fault test sets and transition fault test sets DC2012-83 Ryosuke Wakasugi, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyusyu Univ)
  12:00-13:30 Break ( 90 min. )
Wed, Feb 13 PM 
13:30 - 14:20
(5) 13:30-13:55 Characteristic Analysis of Signal Delay for Resistive Open Fault Detection DC2012-84 Hiroto Ohguri, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.)
(6) 13:55-14:20 On Fault detection method considering adjacent TSVs for a delay fault in TSV DC2012-85 Masanori Nakamura, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ.of Tokushima)
  14:20-14:40 Break ( 20 min. )
Wed, Feb 13 PM 
14:40 - 15:30
(7) 14:40-15:05 An evaluation of Trojan Circuits on AES Encryption Circuits DC2012-86 Amy Ogita, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyushu Univ.)
(8) 15:05-15:30 An Evaluatoin Method of Test Compactors for Secure DC2012-87 Masayoshi Yoshimura, Yusuke Matsunaga (Kyushu Univ.)
  15:30-15:50 Break ( 20 min. )
Wed, Feb 13 PM 
15:50 - 17:05
(9) 15:50-16:15 A Method of Acceptable Fault Identification with Necessary Assignment in Logic Simplification for Error Tolerant Application DC2012-88 Shingo Matsuki, Junpei Kamei, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.)
(10) 16:15-16:40 Temperature and voltage estimation considering manufacturing variability for a monitoring circuit DC2012-89 Yousuke Miyake, Wataru Tsumori, Yasuo Sato, Seiji Kajihara (Kyushu Inst. of Tech.), Yukiya Miura (Tokyo Metropolitan Univ.)
(11) 16:40-17:05 Data volume reduction method for unknown value handling in built-in self test used in field DC2012-90 Yuta Yoshimi (NAIST), Kazumi Hatayama, Yuta Yamato, Tomokazu Yoneda, Michiko Inoue (NAIST/JST)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
DC Technical Committee on Dependable Computing (DC)   [Latest Schedule]
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Last modified: 2013-01-22 01:34:35


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