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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF, VLD | 2024-01-29 15:30 |
Kanagawa | AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
An FPGA-based data compressor for state vector quantum simulators Kaijie Wei, Hideharu Amano (Keio Univ.), Ryohei Niwase (Tsukuba Univ.), Takefumi Miyoshi (WasaLabo), Yoshiki Yamaguchi (Tsukuba Univ.)  VLD2023-87 RECONF2023-90 |
A quantum computer simulator is a tool to emulate the operation of a quantum computer on a classical computer. It is a c... [more] | VLD2023-87 RECONF2023-90 pp.41-46 |
| RECONF | 2023-09-14 16:10 |
Tokyo | Tokyo University of Agriculture and Technology Koganei campus (Primary: On-site, Secondary: Online) |
Building Simulation Environment for Reconfigurable Virtual Accelerator (ReVA) Shunya Kawai, Kazuki Yaguchi, Eriko Maeda (TUAT), Yasunori Osana (Kumamoto Univ.), Takefumi Miyoshi (WasaLabo), Hironori Nakajo (TUAT) RECONF2023-21 |
In this paper，we propose a simulation environment using Post-Implementation Simulation of Vivado to confirm functions of... [more] | RECONF2023-21 pp.11-12 |
| RECONF | 2023-09-14 16:40 |
Tokyo | Tokyo University of Agriculture and Technology Koganei campus (Primary: On-site, Secondary: Online) |
Implementation and Evaluation of a Hardware Accelerator using High-Speed Data Transfer with the Vector Register Sharing Mechanism Go Akamatsu, Tomoaki Tanaka (TUAT), Kiyofumi Tanaka (JAIST), Yasunori Osana (Kumamoto Univ.), Takefumi Miyoshi (Wasalabo), Jubee Tada (Yamagata Univ.), Hironori Nakajo (TUAT) RECONF2023-24 |
Vector processors can load lots of data and perform operations in parallel. The Vector Register Sharing Mechanism, prop... [more] |
RECONF2023-24 pp.18-19 |
| RECONF | 2023-09-15 09:55 |
Tokyo | Tokyo University of Agriculture and Technology Koganei campus (Primary: On-site, Secondary: Online) |
SATA burst data transfer pattern of state vector simulator Hideharu Amano, Wei Kaijie (Keio Univ.), Ryohei Nisawa (Univ. of Tsukuba), Takefumi Miyoshi (Wasalabo), Yoshiki Yamaguchi (Univ. of Tsukuba) RECONF2023-27 |
Quantum computer simulation is indispensable for quantum algorithm research since the results of real quantum computers... [more] |
RECONF2023-27 pp.28-33 |
| RECONF | 2023-09-15 13:50 |
Tokyo | Tokyo University of Agriculture and Technology Koganei campus (Primary: On-site, Secondary: Online) |
Abstraction of Processor-FPGA Communication in Reconfigurable Virtual Accelerator (ReVA) Eriko Maeda, Kazuki Yaguchi, Shunya Kawai, Daichi Teruya (TUAT), Yasunori Osana (Kumamoto Univ.), Takehumi Miyoshi (Wasalabo), Hironori Nakajo (TUAT) RECONF2023-30 |
In recent years, hardware acceleration for HPC and AI has become a challenge due to the lack of resources and the comple... [more] | RECONF2023-30 pp.46-51 |
| IPSJ-SLDM, RECONF, VLD [detail] | 2023-01-23 10:55 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University (Primary: On-site, Secondary: Online) |
Partitioning and Distributing Circuit Using HLS Split Compilation Tool for Reconfigurable Virtual Accelerator (ReVA) Kazuki Yaguchi, Eriko Maeda, Daichi Teruya (TUAT), Yasunori Osana (Univ. of the Ryukyus), Takefumi Miyoshi (WasaLabo), Hironori Nakajo (TUAT) VLD2022-57 RECONF2022-80 |
Currently, hardware acceleration with FPGAs is often used for accelerating computational processes in fields such as art... [more] | VLD2022-57 RECONF2022-80 pp.7-12 |
| IPSJ-SLDM, RECONF, VLD [detail] | 2023-01-24 13:30 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University (Primary: On-site, Secondary: Online) |
Implementing a quantum computer simulator Qulacs on FPGAs Hideharu Amano, Wei Kaijie (Keio Univ.), Takefumi Miyoshi (Wasalab.), Yoshiki Yamaguchi, Ryohei Niwase (U.niv. of Tsukuba) VLD2022-72 RECONF2022-95 |
Quantum computer simulation is indispensable for quantum algorithm research since the results of real quantum computers... [more] |
VLD2022-72 RECONF2022-95 pp.74-79 |
| RECONF | 2022-06-07 14:50 |
Ibaraki | CCS, Univ. of Tsukuba (Primary: On-site, Secondary: Online) |
Vector Register Sharing Mechanism for Hardware Acceleration Tomoaki Tanaka, Ryousuke Higashi (TUAT), Kiyofumi Tanaka (JAIST), Yasunori Osana (Univ. of the Ryukyus), Takefumi Miyoshi (Wasalabo), Jubee Tada (Yamagata Univ.), Hironori Nakajo (TUAT) RECONF2022-5 |
In this paper, we present a vector register sharing mechanism that directly shares vector registers inside the processor... [more] | RECONF2022-5 pp.26-31 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2021-03-25 11:20 |
Online | Online | CPSY2020-53 DC2020-83 |
[more] | CPSY2020-53 DC2020-83 pp.19-24 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 14:15 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | Dynamic Reconfigurable PLA on FPGA and DSL-based Design Methodology Takefumi Miyoshi (wasalabo/e-trees), Hiroki Nakahara (ehime university), Satoshi Funada (e-trees) RECONF2015-50 |
[more] | RECONF2015-50 pp.13-18 |
| RECONF | 2015-09-18 14:55 |
Ehime | Ehime University | Overview of the Reconfigurable Virtual Accelerator ReVA Hironori Nakajo, Yuki Oigo (TUAT), Shozo Takeoka (AXE), Masashi Takemoto (BeatCraft), Takefumi Miyoshi (Wasalabo) RECONF2015-40 |
[more] | RECONF2015-40 pp.45-50 |
| RECONF | 2015-09-19 11:20 |
Ehime | Ehime University | An Approach with DSL for Building up FPGA Primitives Takefumi Miyoshi (WasaLabo/e-tress), Satoshi Funada (e-trees) RECONF2015-46 |
[more] | RECONF2015-46 pp.75-80 |
| ICD, CPSY | 2014-12-01 13:40 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Accelerating I/O-Intensive Applications with FPGAs Takefumi Miyoshi (e-trees/WasaLabo) ICD2014-76 CPSY2014-88 |
[more] | ICD2014-76 CPSY2014-88 pp.19-24 |
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