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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM, ICD 2015-08-24
Kumamoto Kumamoto City Development of a compacted doubly nesting array in Narrow Scribe Line aimed at detecting soft failures of interconnect via
Hiroki Shinkawata, Nobuo Tsuboi (REL), Atsushi Tsuda (RSD), Shingo Sato (Kansai), Yasuo Yamaguchi (REL) SDM2015-58 ICD2015-27
We introduce a new addressable test structure array using for mass production stage which is compacted doubly nesting ar... [more] SDM2015-58 ICD2015-27
SDM 2014-11-06
Tokyo Kikai-Shinko-Kaikan Bldg. An Analytical Modeling for Asymmetric Double Gate Tunnel Field Effect Transistor
Lv Hongfei, Shingo Sato, Yasuhisa Omura (Kansai Univ.), Abhijit Mallik (Univ. Calcutta) SDM2014-96
In this paper, a two-dimensional analytical potential model for the asymmetric double-gate tunnel field transistor (ADG-... [more] SDM2014-96
SDM 2014-11-06
Tokyo Kikai-Shinko-Kaikan Bldg. Physics-based Analytical Model for Gate-on-Germanium Source (GoGeS) TFET
Yasuhisa Omura, Shingo Sato (Kansai Univ.), Abhijit Mallik (Univ. Calcutta) SDM2014-97
 [more] SDM2014-97
SDM 2013-11-15
Tokyo Kikai-Shinko-Kaikan Bldg. Theoretical Modeling of Double-Gate Lateral Tunnel FET
Yasuhisa Omura, Daiki Sato, Shingo Sato (Kansai Univ.), Abhijit Mallik (Univ. of Calcuitta) SDM2013-109
This paper proposes a physics-based analytical device model with the non-local effect for the double-gate lateral TFET i... [more] SDM2013-109
SDM, VLD 2006-09-26
Tokyo Kikai-Shinko-Kaikan Bldg. To be announced
Tsuyoshi Yamamura, Shingo Sato, Yasuhisa Omura (Kansai Univ.)
 [more] VLD2006-46 SDM2006-167
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