Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
OCS, CS (Joint) |
2024-01-11 13:25 |
Kagoshima |
|
Studies for Quantum-Classic Hybrid Systems Employing Logics and Algorithms in Digital Communications Shota Koshikawa, Aruto Hosaka, Shota Nishikawa, Yoshiaki Konishi (MELCO), Motoya Shinozaki, Tomohiro Otsuka, Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ.), Tsuyoshi Yoshida (MELCO) CS2023-94 |
Quantum computing would potentially solve kinds of problems in various fields extremely faster than classic computing ba... [more] |
CS2023-94 pp.6-9 |
CPM |
2023-02-28 13:45 |
Tokyo |
Tokyo University of Technology (Primary: On-site, Secondary: Online) |
Development of adaptive automatic analysis algorithm for single ion channel currents based on Kalman filter and Gaussian Mixture Model clustering Madoka Sato, Hariyama Masanori, Komiya Maki, Ayumi Hirano-Iwata (Tohoku Univ.) CPM2022-98 |
[more] |
CPM2022-98 pp.48-49 |
RECONF |
2022-06-07 16:35 |
Ibaraki |
CCS, Univ. of Tsukuba (Primary: On-site, Secondary: Online) |
Design of a Quantum Annealing Accelerator for Sparse Ising Model Yuta Ohma, Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ.) RECONF2022-10 |
(To be available after the conference date) [more] |
RECONF2022-10 pp.45-47 |
MI |
2017-07-07 09:30 |
Miyagi |
Tohoku Univ. |
[Short Paper]
Estimation of an Optimal Resected Region Considering a Cut-Volume Constraint in Liver Surgery Masanori Hariyama, Yaya Watanabe (Tohoku Univ.), Mitsugi Shimoda (Tokyo Medical Univ.) MI2017-31 |
This article presents an automatic approach to estimate optimal resected liver regions for oncologic surgery planning.
... [more] |
MI2017-31 pp.27-28 |
EST |
2016-05-20 15:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
OpenCL-Based FPGA Platform for FDTD Computation Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Yasuo Ohtera (Tohoku Univ.) EST2016-4 |
We propose a FPGA accelerator for FDTD (finite difference time domain) computation based on a pipelined architecture to ... [more] |
EST2016-4 pp.17-20 |
RECONF |
2016-05-19 10:05 |
Kanagawa |
FUJITSU LAB. |
Succinct-Data-Structure Based on Block-Size-Constrained Compression for a Text-Search Accelerator Masanori Hariyama, Hasitha Muthumala Waidyasooriya (Tohoku Univ.) RECONF2016-2 |
Succinct data structures are introduced to efficiently solve a given problem while representing the data using as a litt... [more] |
RECONF2016-2 pp.3-8 |
RECONF |
2016-05-19 10:25 |
Kanagawa |
FUJITSU LAB. |
Design of an FPGA Platform for Stencil Computation Using OpenCL Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ.) RECONF2016-3 |
Stencil computation is widely used in scientific computations. Its processing speed is usually restricted by the externa... [more] |
RECONF2016-3 pp.9-12 |
RECONF |
2016-05-19 10:45 |
Kanagawa |
FUJITSU LAB. |
Design of an FPGA-based Accelerator for Moleculer Dynamics Using OpenCL Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ.), Kota Kasahara (Osaka Univ.) RECONF2016-4 |
Molecular dynamics (MD) simulations are very important to study physical properties of atoms and molecules. However, a h... [more] |
RECONF2016-4 pp.13-16 |
RECONF |
2016-05-20 11:20 |
Kanagawa |
FUJITSU LAB. |
Evaluation of an OpenCL-Based FPGA Accelerator for Phase-Only Correlation Masanori Hariyama, Shunsuke Tatsumi, Koichi Ito, Takafumi Aoki (Tohoku Univ.) RECONF2016-21 |
This paper proposes a Field Programmable Gate Array (FPGA) implementation of the stereo correspondence matching using Ph... [more] |
RECONF2016-21 pp.103-108 |
RECONF |
2016-05-20 11:40 |
Kanagawa |
FUJITSU LAB. |
Evaluation of an OpenCL-Based FPGA Platform for Particle Filter Masanori Hariyama, Shunsuke Tatsumi (Tohoku Univ.), Norikazu Ikoma (Nippon Institute of Technology) RECONF2016-22 |
Particle filter is one promising method to estimate the internal states in dynamical systems,
and can be used for vari... [more] |
RECONF2016-22 pp.109-113 |
RECONF |
2014-06-11 17:00 |
Miyagi |
Katahira Sakura Hall |
[Invited Talk]
Prospects of Custom Accelerators for Large-Scale Computation
-- Perspectives of Applications, Architectures, and Circuits -- Masanori Hariyama (Tohoku Univ.) RECONF2014-1 |
[more] |
RECONF2014-1 pp.1-4 |
RECONF |
2014-06-12 09:50 |
Miyagi |
Katahira Sakura Hall |
Highly-Parallel FPGA Accelerator for DNA Sequence Alignment Using the Burrows-Wheeler Algorithm Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) RECONF2014-4 |
The mapping of millions of short DNA fragments to a large genome is a very important aspect of the modern bioinformatics... [more] |
RECONF2014-4 pp.17-20 |
RECONF |
2014-06-12 10:50 |
Miyagi |
Katahira Sakura Hall |
An Asynchronous High-Performance FPGA Based on LEDR/Four-Phase-Dual-Rail Hybrid Architecture Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) RECONF2014-6 |
This paper presents an asynchronous high-performance FPGA that combines Four-Phase Dual-Rail (FPDR) protocol and Level-E... [more] |
RECONF2014-6 pp.27-30 |
RECONF |
2014-06-12 16:25 |
Miyagi |
Katahira Sakura Hall |
Design of an FPGA-Based Accelerator for Shortest-Path Search over Large-Scale Graphs Yasuhiro Takei, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) RECONF2014-15 |
Shortest-path search over large scale graphs plays an important role in various applications. However, shortest path alg... [more] |
RECONF2014-15 pp.79-83 |
EMCJ, IEE-EMC, MW, EST [detail] |
2013-10-24 15:45 |
Miyagi |
Tohoku Univ. |
Design of an FPGA-Based FDTD Accelerator Using OpenCL Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) EMCJ2013-73 MW2013-113 EST2013-65 |
High-performance computing systems with dedicated hardware on FPGAs can achieve power efficient computations compared wi... [more] |
EMCJ2013-73 MW2013-113 EST2013-65 pp.73-76 |
IE, SIP, ICD, VLD, IPSJ-SLDM [detail] |
2012-10-18 16:00 |
Iwate |
Hotel Ruiz |
[Invited Talk]
Computing Technologies for Human-Centered Real-World Intelligent Systems Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) VLD2012-45 SIP2012-67 ICD2012-62 IE2012-69 |
[more] |
VLD2012-45 SIP2012-67 ICD2012-62 IE2012-69 pp.31-33 |
RECONF |
2012-09-18 14:25 |
Shiga |
Epock Ritsumei 21, Ritsumeikan Univ. |
Area-Efficeint Design of Asynchronous Circuits Based on Balsa Framework for Synchronous FPGAs Masanori Hariyama, Yoshiya Komatsu, Michitaka Kameyama (Tohoku Univ.) RECONF2012-30 |
[more] |
RECONF2012-30 pp.37-42 |
RECONF |
2012-09-18 14:50 |
Shiga |
Epock Ritsumei 21, Ritsumeikan Univ. |
Architecture of an Asynchronous FPGA for Handshake-Component-Based Design Masanori Hariyama, Yoshiya Komatsu, Michitaka Kameyama (Tohoku Univ.) RECONF2012-31 |
[more] |
RECONF2012-31 pp.43-47 |
RECONF |
2012-09-19 10:40 |
Shiga |
Epock Ritsumei 21, Ritsumeikan Univ. |
Low-Power Heterogeneous Platform for High Performance Computing and Its Application to 2-D FDTD Computation Masanori Hariyama, Hasitha Muthumala Waidyasooriya, Yasuhiro Takei, Michitaka Kameyama (Tohoku Univ.) RECONF2012-39 |
[more] |
RECONF2012-39 pp.89-93 |
ICD, IPSJ-ARC |
2012-01-20 15:10 |
Tokyo |
|
An Evaluation of An FPGA Based on Synchronous/Asynchronous Hybrid Architecture Yoshiya Komatsu, Masanori Hariyama, Shota Ishihara, Ryoto Tsuchiya, Michitaka Kameyama (Tohoku Univ.) ICD2011-142 |
This paper presents an FPGA architecture that combines synchronous and asynchronous architectures. Datapath components s... [more] |
ICD2011-142 pp.93-96 |