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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD | 2024-04-12 14:55 |
Kanagawa | (Primary: On-site, Secondary: Online) |
[Invited Lecture]
遠端ビット線プリチャージとウィークビットトラッキング回路を用いて0.48 - 1.2V動作電圧範囲と27.6Mbit/mm^2の高集積密度を実現する3ナノメートルSRAM Yumito Aoyagi, Makoto Yabuuchi, Tomotaka Tanaka, Yuichiro Ishii, Yoshiaki Osada, Takaaki Nakazato, Koji Nii, Isabel Wang, Yu-Hao Hsu, Hong-Chen Cheng, Hung-Jen Liao, Tsung-Yung Jonathan Chang (TSMC) |
[more] | |
| ICD | 2024-04-12 15:20 |
Kanagawa | (Primary: On-site, Secondary: Online) |
[Invited Lecture]
3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM with 0.5V-1.4V Wide Voltage Range Operation in 3nm FinFET for HPC Applications Yoshiaki Osada, Takaaki Nakazato, Koji Nii, Jhon-Jhy Liaw, Shien-Yang Michael Wu, Quincy Li, Hidehiro Fujiwara, Hung-Jen Liao, Tsung-Yung Jonathan Chang (TSMC) |
[more] | |
| ICD | 2024-04-12 15:45 |
Kanagawa | (Primary: On-site, Secondary: Online) |
[Invited Lecture]
A 3nm-FinFET 4.3 GHz 21.1 Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with a Folded-Bitline Multi-Bank Architecture Masaru Haraguchi, Yorinobu Fujino, Yoshisato Yokoyama, Ming-Hung Chang, Yu-Hao Hsu, Hong-Chen Cheng, Koji Nii, Yih Wang, Tsung-Yung Jonathan Chang (TSMC) |
[more] | |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-17 09:30 |
Online | Online | Design of Nonvolatile SRAM Using SONOS Flash Cell and its Evaluation by Circuit Simulation Takaki Urabe, Koji Nii, Kazutoshi Kobayashi (KIT)  VLD2020-11 ICD2020-31 DC2020-31 RECONF2020-30 |
In this paper, we designed a layout of a nonvolatile SRAM memory using the SONOS Flash memory, and investigated its char... [more] | VLD2020-11 ICD2020-31 DC2020-31 RECONF2020-30 pp.1-5 |
| SDM, ICD, ITE-IST [detail] | 2018-08-08 13:15 |
Hokkaido | Hokkaido Univ., Graduate School of IST M Bldg., M151 | [Invited Lecture]
A Highly Symmetrical 10T 2-Read/Write Dual-port SRAM Bitcell Design In 28nm High-k/Metal-gate Planar Bulk CMOS Technology Yuichiro Ishii, Miki Tanaka, Makoto Yabuuchi, Yohei Sawada, Shinji Tanaka, Koji Nii (Renesas), Tien Yu Lu, Chun Hsien Huang, Shou Sian Chen, Yu Tse Kuo, Ching Cheng Lung, Osbert Cheng (UMC) SDM2018-40 ICD2018-27 |
We propose a highly symmetrical 10T 2-read/write (2RW) dual-port (DP) SRAM bitcell in 28-nm high-k/metal-gate planar bul... [more] | SDM2018-40 ICD2018-27 pp.83-88 |
| SDM, ICD, ITE-IST [detail] | 2018-08-09 12:45 |
Hokkaido | Hokkaido Univ., Graduate School of IST M Bldg., M151 | Study of Impact of BTI's Local Layout Effect Including Recovery Effect on Various Standard-Cells in 10nm FinFET Mitsuhiko Igarashi, Yuuki Uchida, Yoshio Takazawa, Yasumasa Tsukamoto, Koji Shibutani, Koji Nii (Renesas) SDM2018-47 ICD2018-34 |
[more] | SDM2018-47 ICD2018-34 pp.109-113 |
| SDM, ICD, ITE-IST [detail] | 2018-08-09 13:10 |
Hokkaido | Hokkaido Univ., Graduate School of IST M Bldg., M151 | 12-nm Fin-FET 3.0G-search/s 80-bit x 128-entry Dual-port Ternary CAM Makoto Yabuuchi, Masao Morimoto, Koji Nii, Shinji Tanaka (Renesas) SDM2018-48 ICD2018-35 |
[more] | SDM2018-48 ICD2018-35 pp.115-120 |
| ICD | 2018-04-20 10:20 |
Tokyo | [Invited Lecture]
An Implementation of 2RW Dual-Port SRAM using 65 nm Silicon-on-Thin-Box (SOTB) for Smart IoT Yohei Sawada, Yoshiki Yamamoto, Takumi Hasegawa, Hiroki Shinkawata, Makoto Yabuuchi (REL), Yoshihiro Shinozaki, Kyoji Ito (NSW), Shinji Tanaka, Nii Koji, Shiro Kamohara (REL) ICD2018-8 |
[more] | ICD2018-8 pp.29-32 |
|
| ICD | 2018-04-20 10:45 |
Tokyo | [Invited Lecture]
A Dynamic Power Reduction in Synchronous 2RW 8T Dual-Port SRAM by Adjusting Wordline Pulse Timing with Same/Different Row Access Mode Yoshisato Yokoyama, Yuichiro Ishii, Haruyuki Okuda, Koji Nii (REL) ICD2018-9 |
(To be available after the conference date) [more] | ICD2018-9 pp.33-38 |
|
| SDM, ICD, ITE-IST [detail] | 2017-07-31 10:40 |
Hokkaido | Hokkaido-Univ. Multimedia Education Bldg. | A 65 nm 1.0V 1.84ns Silicon-on-Thin-Box (SOTB) Embedded SRAM with 13.72 nW/Mbit Standby Power for Smart IoT Makoto Yabuuchi, Koji Nii, Shinji Tanaka (Renesas), Shinozaki Yoshihiro (Nippon Systemware), Yoshiki Yamamoto, Takumi Hasegawa, Hiroki Shinkawata, Shiro Kamohara (Renesas) SDM2017-33 ICD2017-21 |
[more] | SDM2017-33 ICD2017-21 pp.13-16 |
| ICD | 2017-04-21 10:25 |
Tokyo | [Invited Lecture]
A 6.05-Mb/mm2 16-nm FinFET Double Pumping 1W1R 2-port SRAM with 313ps Read Access Time Yohei Sawada, Makoto Yabuuchi, Masao Morimoto (REL), Toshiaki Sano (RSD), Yuichiro Ishii, Shinji Tanaka (REL), Miki Tanaka (RSD), Koji Nii (REL) ICD2017-12 |
[more] | ICD2017-12 pp.63-65 |
|
| ICD, CPM, ED, EID, EMD, MRIS, OME, SCE, SDM, QIT (Joint) [detail] |
2017-01-31 15:25 |
Hiroshima | Miyajima-Morino-Yado(Hiroshima) | A 5.92-Mb/mm2 28-nm Pseudo 2-Read/Write Dual-Port SRAM Using Double Pumping Circuitry Yuichiro Ishii, Makoto Yabuuchi, Yohei Sawada, Masao Morimoto, Yasumasa Tsukamoto (Renesas Electronics), Yuta Yoshida, Ken Shibata, Toshiaki Sano (Renesas System Design), Shinji Tanaka, Koji Nii (Renesas Electronics) EMD2016-86 MR2016-58 SCE2016-64 EID2016-65 ED2016-129 CPM2016-130 SDM2016-129 ICD2016-117 OME2016-98 |
We propose pseudo dual-port (DP) SRAM by using 6T single-port (SP) SRAM bitcell with double pumping circuitry, which ena... [more] | EMD2016-86 MR2016-58 SCE2016-64 EID2016-65 ED2016-129 CPM2016-130 SDM2016-129 ICD2016-117 OME2016-98 pp.87-92 |
| ICD | 2016-04-14 10:10 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
A Cost Effective Test Screening Method on 40-nm 4-Mb Embedded SRAM for Low-power MCU Yuta Yoshida (RSD), Yoshisato Yokoyama, Yuichiro Ishii (Renesas Electronics), Toshihiro Inada, Koji Tanaka, Miki Tanaka, Yoshiki Tsujihashi (RSD), Koji Nii (Renesas Electronics) ICD2016-1 |
An embedded single-port SRAM with cost effective test screening circuitry is demonstrated for low-power micr... [more] | ICD2016-1 pp.1-6 |
| ICD | 2016-04-14 11:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
A 298-fJ/writecycle 650-fJ/readcycle 8T Three-Port SRAM in 28-nm FD-SOI Process Technology for Image Processor Haruki Mori, Tomoki Nakagawa, Yuki Kitahara, Yuta Kawamoto, Kenta Takagi, Shusuke Yoshimoto, Shintaro Izumi (Kobe Univ.), Koji Nii (Renesas Electronics), Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2016-3 |
This paper presents a low-power and low-voltage 64-kb 8T three-port image memory using a 28-nm FD-SOI process technology... [more] | ICD2016-3 pp.13-16 |
| SDM | 2016-01-28 14:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
2RW Dual-port SRAM Design Challenges in Advanced Technology Nodes Koji Nii, Makoto Yabuuchi (Renesas), Yoshisato Yokoyama (Renesas System Design), Yuichiro Ishii, Takeshi Okagaki, Masao Morimoto, Yasumasa Tsukamoto (Renesas), Koji Tanaka, Miki Tanaka (Renesas System Design), Shinji Tanaka (Renesas) SDM2015-125 |
[more] | SDM2015-125 pp.21-25 |
| SDM, ICD | 2015-08-24 15:50 |
Kumamoto | Kumamoto City | Area and Performance Study of FinFET with Detailed Parasitic Capacitance Analysis in 16nm Process Node Takeshi Okagaki, Koji Shibutani, Masao Morimoto, Yasumasa Tsukamoto, Koji Nii, Kazunori Onozawa (REL) SDM2015-64 ICD2015-33 |
[more] | SDM2015-64 ICD2015-33 pp.37-40 |
| ICD | 2015-04-16 13:00 |
Nagano | [Invited Lecture]
20nm High-Density Single-Port and Dual-Port SRAMs with Wordline-Voltage-Adjustment System for Read/Write Assists Makoto Yabuuchi, Yasumasa Tsukamoto, Masao Morimoto, Miki Tanaka, Koji Nii (Renesas) ICD2015-1 |
[more] | ICD2015-1 pp.1-4 |
|
| ICD | 2015-04-16 13:25 |
Nagano | [Invited Lecture]
A 512-kb 1-GHz 28-nm Partially Write Assisted Dual-Port SRAM with Self Adjustable Negative Bias Bitline Shinji Tanaka (Renesas Electronics), Yuichiro Ishii, Makoto Yabuuchi (Renesas), Toshiaki Sano (Renesas System Design), Koji Tanaka, Yasumasa Tsukamoto, Koji Nii, Hirotoshi Sato (Renesas) ICD2015-2 |
[more] | ICD2015-2 pp.5-8 |
|
| ICD | 2015-04-16 13:50 |
Nagano | [Invited Lecture]
40 nm Dual-port and Two-port SRAMs for Automotive MCU Applications under the Wide Temperature Range of -40 to 170℃ with Test Screening Against Write Disturb Issues Yoshisato Yokoyama, Yuichiro Ishii, Tatsuya Fukuda, Yoshiki Tsujihashi, Atsushi Miyanishi (Renesas Electronics), Shinobu Asayama, Keiichi Maekawa, Kazutoshi Shiba (Renesas Semiconductor Manufacturing Corporation), Koji Nii (Renesas Electronics) ICD2015-3 |
(To be available after the conference date) [more] | ICD2015-3 pp.9-14 |
|
| ICD | 2015-04-16 16:40 |
Nagano | [Panel Discussion]
Advanced semiconductor memories in cloud computing and high-performance computing Koji Nii (Renesas Electronics), Kousuke Miyaji (Shinshu Univ.), Ryousei Takano (AIST), Kensei Takagi, Toru Miwa (SanDisk) ICD2015-7 |
(To be available after the conference date) [more] | ICD2015-7 p.31 |
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