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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 50  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, HWS, ICD 2024-02-29
16:20
Okinawa
(Primary: On-site, Secondary: Online)
[Memorial Lecture] Logic Locking over TFHE for Securing User Data and Algorithms
Kohei Suemitsu, Kotaro Matsuoka, Takashi Sato, Masanori Hashimoto (Kyoto Univ.) VLD2023-118 HWS2023-78 ICD2023-107
This paper proposes the application of logic locking over TFHE to protect both user data and algorithms, such as input u... [more] VLD2023-118 HWS2023-78 ICD2023-107
p.100
ICD 2023-04-10
11:25
Kanagawa
(Primary: On-site, Secondary: Online)
ICD2023-3 (To be available after the conference date) [more] ICD2023-3
p.8
IPSJ-SLDM, RECONF, VLD [detail] 2023-01-24
10:30
Kanagawa Raiosha, Hiyoshi Campus, Keio University
(Primary: On-site, Secondary: Online)
Measurement results of soft error tolerance of LPDDR4 SDRAM and GDDR5 SDRAM
Motoki Kamibayashi, Kazutoshi Kobayashi (Kyoto Inst. of Tech.), Masanori Hashimoto (Kyoto Univ.) VLD2022-65 RECONF2022-88
In recent years, as the memory capacity of computer systems has increased,the reliability of the system has decreased.So... [more] VLD2022-65 RECONF2022-88
pp.34-39
HWS, VLD [detail] 2021-03-03
13:25
Online Online [Memorial Lecture] Mode-wise Voltage-scalable Design with Activation-aware Slack Assignment for Energy Minimization
TaiYu Cheng (Osaka Univ.), Yutaka Masuda (Nagoya Univ.), Jun Nagayama, Yoichi Momiyama (Socionext Inc.), Jun Chen, Masanori Hashimoto (Osaka Univ.) VLD2020-72 HWS2020-47
This paper proposes a design optimization methodology that can achieve a mode-wise voltage scalable (MWVS) design with a... [more] VLD2020-72 HWS2020-47
p.30
HWS, VLD [detail] 2020-03-04
11:20
Okinawa Okinawa Ken Seinen Kaikan
(Cancelled but technical report was issued)
A Study of Arithmetic-Oriented Application Implementations for Via-Switch FPGA
Takashi Imagawa (Ritsumeikan Univ.), Yu Jaehoon (Tokyo Tech), Masanori Hashimoto (Osaka Univ.), Hiroyuki Ochi (Ritsumeikan Univ.) VLD2019-98 HWS2019-71
Via-Switch FPGAs have different features from conventional SRAM-based FPGAs. It is necessary to build the application ci... [more] VLD2019-98 HWS2019-71
pp.25-29
VLD, IPSJ-SLDM 2019-05-15
16:30
Tokyo Ookayama Campus, Tokyo Institute of Technology [Invited Talk] Viaswitch FPGA for Energy Efficient Computing
Masanori Hashimoto (Osaka Univ.) VLD2019-6
 [more] VLD2019-6
pp.37-41
ICD, CPSY, CAS 2018-12-21
14:10
Okinawa   DC Magnetic Field Based Localization with Single Anchor Coil
Ryo Shirai, Pei Hao Chen, Ryohei Shimizu, Masanori Hashimoto (Osaka Univ.) CAS2018-80 ICD2018-64 CPSY2018-46
In this paper, we propose a DC magnetic field based indoor localization method with a single anchor coil. The proposed m... [more] CAS2018-80 ICD2018-64 CPSY2018-46
pp.11-14
ICD, CPSY, CAS 2018-12-23
09:30
Okinawa   [Poster Presentation] Motion prediction using time-series data of geomagnetic sensor array
Ryohei Shimizu, Ryo Shirai, Pei Hao Chen, Masanori Hashimoto (Osaka Univ.) CAS2018-89 ICD2018-73 CPSY2018-55
In this paper, we propose a hand-motion prediction method using time-series data of geomagnetic sensors. Motion predicti... [more] CAS2018-89 ICD2018-73 CPSY2018-55
pp.55-58
VLD, HWS
(Joint)
2018-03-02
09:25
Okinawa Okinawa Seinen Kaikan A study on interconnect delay computation for via-switch based FPGA
Yuki Nakazawa, Ryutaro Doi, Jaehoon Yu, Masanori Hashimoto (Osaka Univ.) VLD2017-120
(To be available after the conference date) [more] VLD2017-120
pp.187-192
VLD, HWS
(Joint)
2018-03-02
10:55
Okinawa Okinawa Seinen Kaikan Experimental study on power reduction by approximate computing with voltage over-scaling
Masahiro Sato, Yutaka Masuda, Masanori Hashimoto (Osaka Univ.) VLD2017-123
(To be available after the conference date) [more] VLD2017-123
pp.205-210
ICD, CPSY, CAS 2017-12-14
15:10
Okinawa Art Hotel Ishigakijima Near-Field Dua-Use Antenna for Magnetic-Field based Communication and Electrical-Field based Distance Sensing in mm^3-Class Sensor Node
Ryo Shirai, Jin Kono (Osaka Univ.), Tetsuya Hirose (Kobe Univ.), Masanori Hashimoto (Osaka Univ.) CAS2017-86 ICD2017-74 CPSY2017-83
This paper proposes a mm${}^3$-class dual-use near-field antenna that can be used for both magnetic-field based communic... [more] CAS2017-86 ICD2017-74 CPSY2017-83
pp.101-105
ICD, CPSY, CAS 2017-12-15
10:30
Okinawa Art Hotel Ishigakijima Dedicated Antenna Less Power Efficient OOK Transmitter for mm-Cubic IoT Nodes
Ryo Shirai (Osaka Univ.), Tetsuya Hirose (Kobe Univ.), Masanori Hashimoto (Osaka Univ.) CAS2017-104 ICD2017-92 CPSY2017-101
This paper proposes a compact VHF-band OOK transmitter that uses coils for radiation as well as oscillation, eliminating... [more] CAS2017-104 ICD2017-92 CPSY2017-101
pp.159-163
SDM 2017-02-06
14:10
Tokyo Tokyo Univ. [Invited Talk] Large Scale Crossbar Switch Block (CSB) with Via-Switch for a Low-Power FPGA
Naoki Banno, Munehiro Tada, Koichiro Okamoto, Noriyuki Iguchi, Toshitsugu Sakamoto, Hiromitsu Hada (NEC Corp.), Hiroyuki Ochi (Ritsumeikan Univ.), Hidetoshi Onodera (Kyoto Univ.), Masanori Hashimoto (Osaka Univ.), Tadahiko Sugibayashi (NEC Corp.) SDM2016-144
 [more] SDM2016-144
pp.29-34
ICD, SDM, ITE-IST [detail] 2016-08-02
09:00
Osaka Central Electric Club [Invited Talk] Soft Error Immunity of Ultra-Low Voltage SRAM
Masanori Hashimoto (Osaka Univ.) SDM2016-54 ICD2016-22
This paper discusses soft error immunity of near-threshold/subthreshold SRAM. In terrestrial environment, high-energy ne... [more] SDM2016-54 ICD2016-22
pp.53-58
DC, CPSY 2015-04-17
13:25
Tokyo   A study of processor architecture suited for intelligent sensing system
Hiroki Hihara, Akira Iwasaki (Univ. of Tokyo), Masanori Hashimoto (Osaka Univ./JST CREST), Hiroyuki Ochi (Rits/JST CREST), Yukio Mitsuyama (KUT/JST CREST), Hidetoshi Onodera (Kyoto Univ./JST CREST), Hiroyuki Kanbara (ASTEM/JST CREST), Kazutoshi Wakabayashi, Takashi Takenaka, Takashi Takenaka, Hiromitsu Hada, Munehiro Tada (NEC/JST CREST) CPSY2015-8 DC2015-8
Sensor nodes are now important elements for the system of social infrastructure, and thus intelligent processing capabil... [more] CPSY2015-8 DC2015-8
pp.43-48
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2014-11-28
16:00
Oita B-ConPlaza An analytic evaluation on soft error immunity enhancement due to temporal triplication
Ryutaro Doi, Masanori Hashimoto, Takao Onoye (Osaka Univ.) VLD2014-112 DC2014-66
Chip-level soft error rate is increasing due to the device miniaturization and larger scale integration. Soft error is o... [more] VLD2014-112 DC2014-66
pp.263-268
CS, CAS, SIP 2014-03-07
09:55
Osaka Osaka City University Media Center Evaluating a sequential 3D node localization method based on node-to-node distance information
Shohei Ukawa, Ryuya Shinada, Yuichi Itoh, Masanori Hashimoto, Takao Onoye (Osaka Univ) CAS2013-124 SIP2013-170 CS2013-137
We are studying a 3D modeling system using a sensor network that distributes many tiny sensor nodes in a flexible object... [more] CAS2013-124 SIP2013-170 CS2013-137
pp.199-204
ICD 2014-01-28
10:00
Kyoto Kyoto Univ. Tokeidai Kinenkan [Invited Talk] Adaptive Performance Compensation with On-Chip Variation Monitoring
Masanori Hashimoto (Osaka Univ.) ICD2013-100
This paper discusses adaptive performance control with two types of on-chip variation sensors. The first sensor
aims to... [more]
ICD2013-100
pp.1-6
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-28
11:05
Kagoshima   [Invited Talk] Toward VLSI Reliability Enhancement by Reconfigurable Architecture
Takao Onoye, Masanori Hashimoto (Osaka Univ.), Yukio Mitsuyama (Kochi Univ. of Tech.), Dawood Alnajjar, Hiroaki Konoura (Osaka Univ.) VLD2013-87 CPM2013-122 ICD2013-99 CPSY2013-63 DC2013-53 RECONF2013-51
Owing to wide spread of VLSI systems, a failure of the VLSIs may lead critical issue in our daily life. Especially in so... [more] VLD2013-87 CPM2013-122 ICD2013-99 CPSY2013-63 DC2013-53 RECONF2013-51
p.183(VLD), p.81(CPM), p.81(ICD), p.27(CPSY), p.183(DC), p.69(RECONF)
RECONF 2013-05-20
17:40
Kochi Kochi Prefectural Culture Hall Flexible reliability mixed-grained reconfigurable architecture supporting behavioral synthesis
Hiroaki Konoura, Dawood Alnajjar (Osaka Univ.), Yukio Mitsuyama (Kochi Univ. Tech.), Hiroyuki Ochi (Ritsumeikan Univ.), Takashi Imagawa (Kyoto Univ.), Shinichi Noda, Kazutoshi Wakabayashi (NEC), Masanori Hashimoto, Takao Onoye (Osaka Univ.) RECONF2013-8
This paper proposes a mixed-grained reconfigurable architecture
that supports C-based behavioral synthesis and flexibl... [more]
RECONF2013-8
pp.41-46
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