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Committee Date Time Place Paper Title / Authors Abstract Paper #
HWS, VLD [detail] 2020-03-04
16:50
Okinawa Okinawa Ken Seinen Kaikan
(Cancelled but technical report was issued)
Additional Training Data Generation for Lithography Hotspot Detection by Modifying Existing Training Data
Gaku Kataoka, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi (Hiroshima City Univ.) VLD2019-107 HWS2019-80
In lithography, a circuit pattern that is highly likely to cause an undesired open- and short-circuit after transfer is ... [more] VLD2019-107 HWS2019-80
pp.77-82
HWS, VLD [detail] 2020-03-04
17:15
Okinawa Okinawa Ken Seinen Kaikan
(Cancelled but technical report was issued)
A Preliminary Study of Spectrum-based Feature Vectors for Lithography Hotspot Detection
Masato Inagi, Gaku Kataoka, Shinobu Nagayama, Shin'ichi Wakabayashi (Hiroshima City Univ.) VLD2019-108 HWS2019-81
 [more] VLD2019-108 HWS2019-81
pp.83-88
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-15
15:45
Ehime Ehime Prefecture Gender Equality Center Lithography Hotspot Detection Based on Feature Vectors Considering Wire Width and Distance
Gaku Kataoka, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi (Hiroshima City Univ.) VLD2019-51 DC2019-75
In lithography, which is one of the semiconductor manufacturing processes, there is a pattern that is highly likely to c... [more] VLD2019-51 DC2019-75
pp.185-190
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2018-12-07
14:35
Hiroshima Satellite Campus Hiroshima Comparison of Machine Learning-Based Lithography Hotspot Detection Methods under Optimized Hyperparameters
Gaku Kataoka, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi (Hiroshima City Univ.) VLD2018-71 DC2018-57
 [more] VLD2018-71 DC2018-57
pp.215-220
VLD, HWS
(Joint)
2018-03-01
09:00
Okinawa Okinawa Seinen Kaikan A Study of Lithography Hotspot Detection Method Based on Feature Vectors Considering Distances between Wires
Gaku Kataoka, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi (Hiroshima City Univ.) VLD2017-105
In lithography, which is one of the LSI fabrication processes, a layout pattern with a high failure probability is calle... [more] VLD2017-105
pp.97-102
 Results 1 - 5 of 5  /   
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