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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM, ICD 2015-08-25
13:10		 Kumamoto Kumamoto City [Invited Talk] 45.5% Energy Reduction by applying DVFS and Multi-Level-Shift Architecture for Low-Power SoCs
Satoshi Tanabe, Atsushi Muramatsu, Ken-ichi Kawasaki, Makoto Mouri, Teruo Ishihara (Flab) SDM2015-69 ICD2015-38		  [more] SDM2015-69 ICD2015-38
pp.63-68
CAS 2010-01-28
15:25		 Kyoto Kyoudai-Kaikan Bldg. Suppression of Power-supply-voltage Fluctuation on System LSIs using Power Gating technique
Ken-ichi Kawasaki, Koichi Nakayama, Satoshi Tanabe, Hisanori Fujisawa (Fujitsu Lab.) CAS2009-69		 A power gating technique minimizing the area overhead of power switches was developed for low power SOCs.
The amount of... [more]		 CAS2009-69
pp.31-36
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