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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ICM, NS, CQ, NV (Joint) |
2023-11-22 09:00 |
Ehime |
Ehime Prefecture Gender Equality Center (Primary: On-site, Secondary: Online) |
Evaluation of Improvement Plans to Increase the Efficiency of Performance Data Transfer for Server Systems Chika Iiyama (Ocha Univ.), Akira Hirai, Mari Yamaoka, Naoto Fukumoto (Fujitsu), Masato Oguchi (Ocha Univ.) NS2023-117 |
In recent years, demand for shared use of multiple servers has been increasing. In order to perform load balancing on th... [more] |
NS2023-117 pp.38-43 |
CPSY, DC, IPSJ-ARC [detail] |
2022-10-12 15:15 |
Niigata |
Yuzawa Toei Hotel (Primary: On-site, Secondary: Online) |
Performance Evaluation on MPI Communication Using Lossy Compression Yao Hu (NII), Takumi Honda, Yusuke Nagasaka, Naoto Fukumoto (FUJITSU), Michihiro Koibuchi (NII) CPSY2022-25 DC2022-25 |
(To be available after the conference date) [more] |
CPSY2022-25 DC2022-25 pp.43-48 |
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] |
2022-03-11 14:30 |
Online |
Online |
Performance Evaluation on Auto Tuned MPI Communication Yao Hu, Shoichi Hirasawa (NII), Takumi Honda, Yusuke Nagasaka, Naoto Fukumoto (FUJITSU), Michihiro Koibuchi (NII) CPSY2021-61 DC2021-95 |
In parallel applications, a significant amount of execution time is spent on exchanging data between processes. MPI (Mes... [more] |
CPSY2021-61 DC2021-95 pp.97-102 |
ICD, IPSJ-ARC |
2008-05-14 14:15 |
Tokyo |
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Performance Balancing: An Efficient Helper-Thread Execution on CMPs Kenichi Imazato, Naoto Fukumoto, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) |
Conventional CMPs attempt to exploit the thread-level parallelism (TLP)
by using all of the cores integrated in a chip.... [more] |
ICD2008-31 pp.75-80 |
ICD, IPSJ-ARC |
2008-05-14 17:00 |
Tokyo |
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Performance Balancing: An Implementation of Efficient On-chip Memory Hierarchy on Cell/B.E. Tetsuo Hayashi, Naoto Fukumoto, Kenichi Imazato, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) |
We have proposed the concept of Performance Balancing to improve the CMP performance. This approach attempts to exploit ... [more] |
ICD2008-36 pp.105-110 |
ICD, IPSJ-ARC |
2007-05-31 13:15 |
Kanagawa |
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Effect of Data Prefetching on Chip MultiProcessor Naoto Fukumoto, Tomonobu Mihara, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) |
Chip MultiProcessors (or CMPs) can achieve higher performance by means of exploiting thread level parallelism. Increasin... [more] |
ICD2007-20 pp.19-24 |
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