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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
OME |
2008-10-31 14:15 |
Tokyo |
ToKyo Univ. Faculty of Engineering Bldg.6 |
Mobility Improvement in Pentacene Thin Film Transistors Prepared in a Low-Pressure H2 Ambient Takamichi Yokoyama, Park Chang Bum, Kosuke Nagashio, Koji Kita, Akira Toriumi (Univ. of Tokyo) OME2008-53 |
[more] |
OME2008-53 pp.15-20 |
SDM |
2008-06-09 16:15 |
Tokyo |
An401・402, Inst. Indus. Sci., The Univ. of Tokyo |
Accurate Evaluation of MOS Inversion Layer Mobility Akira Toriumi, Koji Kita (Univ. Tokyo) SDM2008-45 |
[more] |
SDM2008-45 pp.17-22 |
SDM |
2008-06-10 10:55 |
Tokyo |
An401・402, Inst. Indus. Sci., The Univ. of Tokyo |
The role of the high-k/SiO2 interface in the control of the threshold voltage for high-k MOS devices Kunihiko Iwamoto, Yuuichi Kamimuta (MIRAI-ASET), Yu Nunoshige (Shibaura Institute of Technology), Akito Hirano, Arito Ogawa, Yukimune Watanabe (MIRAI-ASET), Shinji Migita, Wataru Mizubayashi, Yukinori Morita (MIRAI-ASRC, AIST), Masashi Takahashi (MIRAI-ASET), Hiroyuki Ota (MIRAI-ASRC, AIST), Toshihide Nabatame (MIRAI-ASET), Akira Toriumi (The University of Tokyo) SDM2008-51 |
[more] |
SDM2008-51 pp.53-58 |
SDM |
2007-06-08 13:35 |
Hiroshima |
Hiroshima Univ. ( Faculty Club) |
Impact of Interface Reactions on Electrical Characteristics of Ge/High-k Devices Koji Kita, Hideyuki Nomura, Sho Suzuki, Toshitake Takahashi, Tomonori Nishimura, Akira Toriumi (Univ.of Tokyo) SDM2007-47 |
The impact of high-k material selection on the electrical characteristics of high-k/Ge MIS capacitors was investigated. ... [more] |
SDM2007-47 pp.85-90 |
SDM |
2006-06-22 14:15 |
Hiroshima |
Faculty Club, Hiroshima Univ. |
unknown Wataru Mizubayashi (MIRAI-ASRC, AIST), Arito Ogawa, Toshihide Nabatame, Hideki Satake (MIRAI-ASET), Akira Toriumi (MIRAI-ASRC, AIST, Univ. of Tokyo) |
[more] |
SDM2006-61 pp.107-111 |
ICD, SDM |
2005-08-19 11:10 |
Hokkaido |
HAKODATE KOKUSAI HOTEL |
Improvement of threshold voltage asymmetry by Al compositional mudulation and partially silicided gate electrode for Hf-based high-k CMOSFETs Masaru Kadoshima, Arito Ogawa, Masashi Takahashi (MIRAI-ASET), Hiroyuki Ota (MIRAI-ASRC, AIST), Nobuyuki Mise, Kunihiko Iwamoto (MIRAI-ASET), Shinji Migita (MIRAI-ASRC, AIST), Hideaki Fujiwara, Hideki Satake, Toshihide Nabatame (MIRAI-ASET), Akira Toriumi (MIRAI-ASRC, AIST, The Univ. of Tokyo) |
Threshold voltage (Vth) tuning by engineering Fermi-level pinning (FLP) on HfAlOx(N) dielectrics is demonstrated for CMO... [more] |
SDM2005-148 ICD2005-87 pp.31-36 |
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