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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-26 16:15 |
Oita | B-ConPlaza | General-Purpose Pattern Recognition Processor Based on the k Nearest-Neighbor Algorithm with High-Speed, Low-Power Shogo Yamasaki, Toshinobu Akazawa, Fengwei An, Hans Juergen Mattausch (Hiroshima Univ.)  VLD2014-75 DC2014-29 |
A learning and pattern recognition processors for the k nearest neighbor (k-NN) recognition algorithm using a nearest Eu... [more] | VLD2014-75 DC2014-29 pp.21-26 |
| ICD | 2014-01-28 15:00 |
Kyoto | Kyoto Univ. Tokeidai Kinenkan | [Poster Presentation]
Digital Word-Parallel Associative Memory for Smallest Euclidean Distance Search and Architecture verification in 180nm/65nm CMOS Toshinobu Akazawa, Hans Juergen Mattausch (Hiroshima Univ.) ICD2013-132 |
The reported digital word-parallel associative memory architecture for nearest Euclidean distance (ED) search is based o... [more] | ICD2013-132 p.77 |
| ICD | 2014-01-29 14:00 |
Kyoto | Kyoto Univ. Tokeidai Kinenkan | Development of a Learning and Recognition SoC Based on the k Nearest-Neighbor Algorithm with High-Speed, Low-Power and Error-Free Operation Shogo Yamasaki, Toshinobu Akazawa, Fengwei An, Hans Juergen Mattausch (Hiroshima Univ) ICD2013-136 |
In this study, we propose the hardware implementation of the k-nearest neighbor method on an SoC with learning and recog... [more] | ICD2013-136 pp.85-88 |
| IPSJ-SLDM, VLD | 2011-05-18 15:05 |
Fukuoka | Kitakyushu International Conference Center | Path Encoding Method for High Speed Frequency-Mapping Associative Memory Seiryu Sasaki, Masahiro Yasuda, Akio Kawabata, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.) VLD2011-3 |
[more] | VLD2011-3 pp.13-18 |
| SDM | 2010-11-12 14:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Modeling of 2D Bias Control in Overlap Region of High-Voltage MOSFETs Akihiro Tanaka, Yasunori Oritsuki, Hideyuki Kikuchihara, Masataka Miyake, Hans Juergen Mattausch, Mitiko Miura-Mattausch (Hiroshima Univ.), Yong Liu, Keith Green (TI) SDM2010-181 |
High-voltage MOSFETs have been applied in a wide range of bias voltages from a few volts up to several hundred volts by ... [more] | SDM2010-181 pp.53-57 |
| ICD | 2009-12-14 13:30 |
Shizuoka | Shizuoka University (Hamamatsu) | [Poster Presentation]
An Improved Face-Detection Method for a Massive-Parallel Memory-Embedded SIMD Matrix Processor MX-1 Hirokazu Hiramoto, Takeshi Kumaki, Yuta Imai, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.) ICD2009-92 |
Recently, face-detection processing is more widely used in security applications, such as video surveillance system or e... [more] | ICD2009-92 pp.83-88 |
| ICD | 2009-12-14 13:30 |
Shizuoka | Shizuoka University (Hamamatsu) | [Poster Presentation]
Associative-Memory-Based LSI with Adaptive-Learning Capability Akio Kawabata, Wataru Imafuku, Tania Ansari, Hans Juergen Mattausch, Tetsushi Koide (Hiroshima Univ.) ICD2009-93 |
When pattern recognition is achieved by conventional techniques, processing time becomes long and it is difficult to de... [more] | ICD2009-93 pp.89-94 |
| CAS, NLP | 2009-09-24 16:00 |
Hiroshima | Hiroshima Univ. Higashi Senda Campus | [Invited Talk]
Massive-Parallel Memory-Embedded SIMD Processor Architecture Tetsushi Koide, Takeshi Kumaki, Hans Juergen Mattausch (Hiroshima Univ.) CAS2009-34 NLP2009-70 |
A multimedia processor requires the four capabilities offast processing, small area size, low power consumption and pr... [more] |
CAS2009-34 NLP2009-70 pp.59-64 |
| CAS, NLP | 2009-09-25 09:00 |
Hiroshima | Hiroshima Univ. Higashi Senda Campus | Analysis of Process Variations by using Ring Oscillator Akihiro Kaya, Koh Johguchi, Hans Juergen Mattausch, Tetsushi Koide (Hiroshima Univ.) CAS2009-36 NLP2009-72 |
Process variations are rapidly increasing as the transistor size is scaled down. Therefore, the negative effects of the ... [more] | CAS2009-36 NLP2009-72 pp.71-76 |
| CAS, NLP | 2009-09-25 09:25 |
Hiroshima | Hiroshima Univ. Higashi Senda Campus | Image Segmentation Algorithm with Parameter Self-Adjustment Considering the Image Characteristic Ryosuke Kimura, Tatsuya Sugahara, Tomoya Renge, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.) CAS2009-37 NLP2009-73 |
In this report, we propose a self adjustment technique of the growth-deciding parameters for a region-growing image-segm... [more] | CAS2009-37 NLP2009-73 pp.77-82 |
| CAS, NLP | 2009-09-25 11:00 |
Hiroshima | Hiroshima Univ. Higashi Senda Campus | Associative-Memory-Based LSI Architecture with Automatic Learning Functionality and Application to Handwritten-Character Recognition Wataru Imafuku, Tania Ansari, Akio Kawabata, Hans Juergen Mattausch, Tetsushi Koide (Hiroshima Univ.) CAS2009-40 NLP2009-76 |
n the presented research on VLSI-system design for handwritten-character learning and recognition, an associative memory... [more] | CAS2009-40 NLP2009-76 pp.91-96 |
| CAS, NLP | 2009-09-25 11:25 |
Hiroshima | Hiroshima Univ. Higashi Senda Campus | Efficient Ternary Multiple Search-Operation Architecture based on Flexible Multi-Ported Content Addressable Memory and its Application Takeshi Kumaki, Yuta Imai, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.) CAS2009-41 NLP2009-77 |
This paper presents a Ternary Flexible Multi-ported Content Addressable Memory (TFMCAM) architecture utilizing asynchron... [more] | CAS2009-41 NLP2009-77 pp.97-102 |
| CPSY | 2007-10-25 15:10 |
Kumamoto | Kumamoto University | Acceleration of Multimedia Data Processing with CAM-Enhanced Massive-Parallel SIMD Matrix Processor Takeshi Kumaki, Masakatsu Ishizaki, Masaharu Tagami, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.), Takayuki Gyohten, Hideyuki Noda, Yasuto Kuroda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito (Renesas Technology) CPSY2007-27 |
A multimedia processor requires four capabilities, fast processing, small area size, low power consumption and programma... [more] | CPSY2007-27 pp.19-24 |
| CPSY | 2007-10-25 15:50 |
Kumamoto | Kumamoto University | Acceleration of AES Encryption with CAM-Enhanced Massive-Parallel SIMD Matrix Processor Masakatsu Ishizaki, Takeshi Kumaki, Masaharu Tagami, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.), Takayuki Gyohten, Hideyuki Noda, Yoshihiro Okuno, Kazutami Arimoto (Renesas Technology) CPSY2007-28 |
We have previously reported that the Content Addressable Memory (CAM)-enhanced massive-parallel Single Instruction Multi... [more] | CPSY2007-28 pp.25-30 |
| ICD, SDM | 2007-08-24 16:30 |
Hokkaido | Kitami Institute of Technology | A 128-Kbit, 16-Port SRAM Design with Multi-Stage-Sensing Scheme in 90-nm CMOS Technology Koh Johguchi, Yuya Mukuda, Shinya Izumi, Hans Juergen Mattausch, Tetsushi Koide (Hiroshima Univ.) SDM2007-169 ICD2007-97 |
[more] | SDM2007-169 ICD2007-97 pp.149-154 |
| ICD, ITE-CE | 2006-12-14 16:30 |
Hiroshima | A Chip for Real-Time Segmentation Processing with Object-based Image-Scan Architecture Kazutoshi Awane, Hidekazu Adachi, Takashi Morimoto, Kosuke Yamaoka, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.) |
[more] | ICD2006-156 pp.73-78 |
|
| ICD, ITE-CE | 2006-12-15 12:05 |
Hiroshima | Multiple CAM Matches and Self-adapting Codeword Table for Optimized Real-time Huffman Encoding Masakatsu Ishizaki, Takeshi Kumaki, Yutaka Kono, Masaharu Tagami, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.), Yasuto Kuroda, Takayuki Gyohten, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito (Renesas Technology Corp.) |
[more] | ICD2006-165 pp.125-130 |
|
| ICD, ITE-CE | 2006-12-15 13:20 |
Hiroshima | [Special Invited Talk]
Memory-based Information Processing Systems Tetsushi Koide (Hiroshima Univ.), Hans Juergen Mattausch (HIroshima Univ.) |
[more] | ICD2006-166 pp.131-136 |
|
| ICD, SIP, IE, IPSJ-SLDM | 2006-10-26 11:30 |
Miyagi | Super parallel SIMD processor with CAM based high-speed pattern matching capability Yutaka Kono, Takeshi Kumaki, Masakatsu Ishizaki, Masaharu Tagami, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.), Takayuki Gyohten, Hideyuki Noda, Yasuto Kuroda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito (Renesas) |
A super parallel SIMD processor has been developed for handling the increasing amount of multimedia data efficiently. ... [more] |
SIP2006-90 ICD2006-116 IE2006-68 pp.39-44 |
|
| ICD | 2005-04-15 13:30 |
Fukuoka | Application of Bank-Based Multiport Memory to the Microprocessor Caches Koh Johguchi, Zhaomin Zhu (Hiroshima Univ.), Tai Hirakawa (Hiroshima City Univ.), Hans Juergen Mattausch, Tetsushi Koide (Hiroshima Univ.), Tetsuo Hironaka, Kazuya Tanigawa (Hiroshima City Univ.) |
[more] | ICD2005-17 pp.25-30 |
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