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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| OPE, LQE, CPM, EMD, R | 2013-08-29 16:00 |
Hokkaido | sun-refre Hakodate | Evaluation of LSI Inner Structure by Using Quasi-static Electrical Field Sensing Technology Masaru Sanada (Kochi Univ. of Tech.), Seigo Ito (Konaka Electronics)  R2013-41 EMD2013-47 CPM2013-66 OPE2013-70 LQE2013-40 |
[more] | R2013-41 EMD2013-47 CPM2013-66 OPE2013-70 LQE2013-40 pp.65-70 |
| R | 2011-05-13 17:15 |
Kochi | Kochi City Culture-Plaza Cul-Port | Candidate Fault Portions Detection using CMOS Transistor Operation Point Analysis Kazuaki Kishi, Masaru Sanada (KUT) R2011-14 |
We have developed fault diagnosis software with easy operation, high diagnosis accuracy and fast processing speed. The t... [more] | R2011-14 pp.35-40 |
| EMD, R | 2011-02-18 15:00 |
Shizuoka | Shizuoka Univ. (Hamamatsu) | Detection of degradation sign of LSI operation using IDDQ Shunsuke Sakamoto, Masaru Sanada (KUT) R2010-46 EMD2010-147 |
VDD supply current (IDDQ) information has been applied to detect LSI evaluation technology, IDDQ which has high fault de... [more] | R2010-46 EMD2010-147 pp.25-30 |
| EMD, R | 2011-02-18 15:25 |
Shizuoka | Shizuoka Univ. (Hamamatsu) | Logic stabilization of unstable logic circuit with open fault Taiki Yasutomi, Masaru Sanada (KUT) R2010-47 EMD2010-148 |
An experiment for stabilization of output logic brought by floating gate fault with unsuitable electric value has been e... [more] | R2010-47 EMD2010-148 pp.31-36 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-03 13:25 |
Kochi | Kochi City Culture-Plaza | Detection of Fault Candidate portions by DEF data Visualization Kazuaki Kishi, Masaru Sanada (Kochi Univ. of Tech.) VLD2009-53 DC2009-40 |
Line information visualized using DEF data, and layout data of unique fault formations makes it possible to indicate fa... [more] | VLD2009-53 DC2009-40 pp.85-88 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-04 14:05 |
Kochi | Kochi City Culture-Plaza | Logic stabilization way of open fault with unsuitable logic
-- Aim in simple diagnosis technology -- Masaru Sanada (Koch Univ. of Tech.), Keishi Hashida (Renesas Design), Taiki Yasutomi (Koch Univ. of Tech.) VLD2009-64 DC2009-51 |
An experiment for stabilization of output logic brought by floating gate fault with unsuitable electric value has been e... [more] | VLD2009-64 DC2009-51 pp.161-166 |
| IN | 2009-06-12 09:30 |
Fukui | UNIVERSITY OF FUKUI | A proposal and technical requirements of sympathetic communication services applied lifelog Masaru Sanada, Hikaru Suzuki (NTT) IN2009-19 |
We propose communication services that handle human’s feelings about sympathy. We think that images show the human’s fee... [more] | IN2009-19 pp.37-41 |
| R | 2008-06-20 14:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Improvement of Quality Awareness through LSI Evaluation and Analysis
-- Trial at University -- Masaru Sanada (KUT) R2008-19 |
At the university, I have executed the trial to improve of quality awareness to the student. My laboratory has treated a... [more] | R2008-19 pp.25-30 |
| EMD, R | 2008-02-15 10:40 |
Kyoto | Development of Simple ESD Checker and it's Application
-- Detection of ESD Checker and it's Application -- Norio Yamasaki, Masaru Sanada (KUT) R2007-59 EMD2007-114 |
Simple Electro Static Discharge(ESD) tester has been developed for evaluating ESD sensitivity of LSI and studying ESD pr... [more] | R2007-59 EMD2007-114 pp.1-6 |
|
| R | 2007-09-14 10:55 |
Kochi | Kochi Univ. of Technology | Fault logic trace by Using Transistor Operating Point Analysis
-- Diagnosis of Feed Back Fault with Oscillating Phenomenon -- Masaru Sanada, Tonoya Nakamura, Keishi Hashida (KUT) R2007-30 |
[more] | R2007-30 pp.5-10 |
| ED, SDM, R | 2006-11-24 13:00 |
Osaka | Central Electric Club | [Invited Talk]
Fault diagnosis technology based on transistor behavor analysis Masaru Sanada (KUT) |
[more] | R2006-31 ED2006-176 SDM2006-194 pp.1-6 |
| ICD, CPM | 2005-01-28 11:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | On Observability Quantification for Fault Diagnosis of VLSI Circuits Naoya Toyota, Seiji Kajihara, Xiaoqing Wen (KIT), Masaru Sanada (NEC Electoronics) |
In most fault diagnosis, logic values can be observed at primary outputs and scan flip-flops as observation points. Howe... [more] | CPM2004-167 ICD2004-212 pp.31-34 |
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