Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SDM, ICD, ITE-IST [detail] |
2017-08-02 13:00 |
Hokkaido |
Hokkaido-Univ. Multimedia Education Bldg. |
[Invited Talk]
A 0.7V 12b 160MS/s 12.8fJ/conv. Calibration-free Pipelined-SAR ADC in 28nm CMOS with Digital Amplifier Technique Kentaro Yoshioka, Tomohiko Sugimoto, Naoya Waki, Sinnyoung Kim, Daisuke Kurose, Hirotomo Ishii, Masanori Fururta, Akihide Sai, Tetsuro Itakura (Toshiba) SDM2017-46 ICD2017-34 |
[more] |
SDM2017-46 ICD2017-34 pp.115-116 |
ICD, ITE-IST |
2015-07-03 17:00 |
Kanagawa |
National Defense Academy |
A High-Frequency DC-DC Converter with 68-% Reduction in Output Fluctuation using One-Shot Circuit Taichi Ogawa, Takeshi Ueno, Takayuki Miyazaki, Tetsuro Itakura (Toshiba) ICD2015-25 |
A tightly regulated DC-DC buck converter with an on-chip one-shot circuit is presented. The proposed one-shot circuit re... [more] |
ICD2015-25 pp.65-68 |
ICD, ITE-IST |
2014-07-03 10:50 |
Shimane |
Izumo-shi (Shimane) |
A 4-GS/s 5-bit Flash ADC with Dynamic pre-amplifier Junya Matsuno, Masanori Furuta, Tetsuro Itakura (Toshiba) ICD2014-21 |
[more] |
ICD2014-21 pp.13-16 |
ICD, ITE-IST |
2013-07-05 14:25 |
Hokkaido |
San Refre Hakodate |
A 1.0-V 12-bit Digitally Calibrated SAR ADC Using Hybrid DAC Technique Masanori Furuta, Hirotomo Ishii, Tomohiko Sugimoto, Toru Okawa, Masazumi Shiochi, Tetsuro Itakura (Toshiba) ICD2013-39 |
A 1.0-V, 12-bit, 80-MS/s two time-interleaved successive
approximation register (SAR) ADC with 1.2-V differential
full... [more] |
ICD2013-39 pp.93-96 |
CAS |
2013-01-28 15:20 |
Oita |
Beppu International Convention Center |
[Fellow Memorial Lecture]
Analog Circuit Techniques for Smart Society Tetsuro Itakura (Toshiba) CAS2012-77 |
To contribute a smart society with analog circuit techniques through analog circuit techniques, the trend of the analog ... [more] |
CAS2012-77 pp.65-70 |
NLP, CAS |
2012-09-20 15:55 |
Kochi |
Eikokuji Campus, University of Kochi |
[Invited Talk]
All-Digital Background Calibration for Time-Interleaved ADC Using Pseudo Aliasing Signal Junya Matsuno, Takafumi Yamaji, Masanori Furuta, Tetsuro Itakura (Toshiba) CAS2012-37 NLP2012-63 |
A new adaptive background calibration for gain mismatches and sample-time mismatches in a Time-Interleaved Analog-to-Dig... [more] |
CAS2012-37 NLP2012-63 pp.41-44 |
CAS, CS, SIP |
2012-03-08 13:45 |
Niigata |
The University of Niigata |
A Time-Interleave Pipelined SAR ADC Using Amplifier Sharing Technique Masanori Furuta, Taichi Ogawa, Tetsuro Itakura (Toshiba) CAS2011-128 SIP2011-148 CS2011-120 |
An eight-channel time-interleaved ADC with individual reference voltage buffers is presented. Each channel consists of b... [more] |
CAS2011-128 SIP2011-148 CS2011-120 pp.121-124 |
CAS |
2011-01-25 16:30 |
Kumamoto |
Kumamoto University |
Noise analysis of harmonic rejection downconverters Takafumi Yamaji, Junya Matsuno, Tetsuro Itakura (Toshiba) CAS2010-93 |
Switching downconverters are sensitive to the harmonic signals that are undesired at multiple frequencies of the LO freq... [more] |
CAS2010-93 pp.51-54 |
CS, SIP, CAS |
2008-03-07 13:00 |
Yamaguchi |
Yamaguchi University |
[Poster Presentation]
A Low Power PLL with a Phase Detection Techinique reducing Dead Zone Akihide Sai (Toshiba Corp.), Yuka Kobayashi (Tokyo Tech.), Tetsuro Itakura (Toshiba Corp.) CAS2007-147 SIP2007-222 CS2007-112 |
[more] |
CAS2007-147 SIP2007-222 CS2007-112 pp.101-102 |
SIP, CAS, CS |
2007-03-05 14:30 |
Tottori |
Blancart Misasa (Tottori) |
Design of 10-bit, 40MSample/s Current-Steering D/A Converter for WLAN Shinji Otaki, Takeshi Ueno, Tetsuro Itakura (Toshiba) CAS2006-87 SIP2006-188 CS2006-104 |
In an advanced CMOS technology, the supply voltage has been decreased and digital circuits should operate at 1.2V supply... [more] |
CAS2006-87 SIP2006-188 CS2006-104 pp.57-61 |
CAS |
2007-01-29 13:50 |
Ehime |
Ehime Univ. |
Noise analyses of single to poly-phase conversion with a frequency converter Takafumi Yamaji, Tetsuro Itakura (Toshbia), Hiroshi Tanimoto (Kitami Institute of Technology) |
[more] |
CAS2006-64 pp.13-18 |
ICD, ITE-CE |
2006-12-14 10:15 |
Hiroshima |
|
Low-Power A/D Converters for Wireless Applications Tomohiko Ito, Takeshi Ueno, Daisuke Kurose, Takafumi Yamaji, Tetsuro Itakura (Toshiba) |
[more] |
ICD2006-146 pp.19-24 |
ICD, ITE-CE |
2006-12-14 11:15 |
Hiroshima |
|
A Fast fc Automatic Tuning Cicuit with Wide Tuning Range for WCDMA Direct Conversion Receiver Systems Osamu Watanabe, Rui Ito, Shigehito Saigusa, Tadashi Arai, Tetsuro Itakura (Toshiba) |
[more] |
ICD2006-148 pp.31-35 |
NLP, CAS |
2006-10-05 11:15 |
Osaka |
|
A study on a 3-phase analog-to-digital converter Takafumi Yamaji, Takeshi Ueno, Tetsuro Itakura (Toshiba) |
[more] |
CAS2006-39 NLP2006-62 pp.29-33 |
RCS, AP, WBS, SR, MW, MoNA (Joint) |
2006-03-03 14:40 |
Kanagawa |
YRP |
A Study on Clock Signal Generator for Software Defined Radio Akihide Sai, Takafumi Yamaji, Tetsuro Itakura (Toshiba) |
[more] |
SR2005-72 pp.41-45 |
ICD |
2005-12-16 13:25 |
Kochi |
|
200 MSPS Low-Power A-to-D and D-to-A Converters for Next Generation Mobile Communication System Daisuke Kurose, Takafumi Yamaji, Takeshi Ueno, Tomohiko Ito, Tetsuro Itakura, Akihide Sai (Toshiba Corp.) |
For the next generation mobile communication system, high-speed and low power analog-to-digital converters (ADCs) and di... [more] |
ICD2005-200 pp.49-54 |
SR |
2005-11-25 09:15 |
Okinawa |
Okinawa Wemen's Center |
200 MSPS Low-Power A-to-D and D-to-A Converters for Next Generation Mobile Communication System Takafumi Yamaji, Daisuke Kurose, Takeshi Ueno, Tomohiko Ito, Tetsuro Itakura, Akihide Sai (Toshiba) |
For the next generation mobile communication system, high-speed and low power analog-to-digital converters (ADCs) and di... [more] |
SR2005-53 pp.43-48 |
SR |
2005-07-28 - 2005-07-29 |
Kanagawa |
Yokosuka Research Park |
A low-power analog-to-digital converter for the next generation mobile communication system Takafumi Yamaji, Tomohiko Ito, Daisuke Kurose, Takeshi Ueno, Tetsuro Itakura (Toshiba) |
For the next generation mobile communication system, the estimated requirements for analog-to-digital converters (ADCs) ... [more] |
SR2005-41 pp.137-141 |