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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 29  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, HWS, ICD 2024-03-01
14:25
Okinawa
(Primary: On-site, Secondary: Online)
Modeling of Thin-Film Ferroelectric Memcapacitors Based on Gaussian Process Regression and its evaluation
Ryoga Urata (KIT), Taiyo Shinoda, Mutsumi Kimura (Ryukoku Univ.), Michihiro Shintani (KIT) VLD2023-128 HWS2023-88 ICD2023-117
Ferroelectric memcapacitors using thin-film materials are attracting attention as a circuit element that can realize sum... [more] VLD2023-128 HWS2023-88 ICD2023-117
pp.151-156
HWS, VLD 2023-03-01
11:50
Okinawa
(Primary: On-site, Secondary: Online)
Acceleration of Memristor Modeling Based on Machine Learning Using Gaussian Process
Yuta Shintani, Michiko Inoue (Naist), Michihiro Shintani (Kyoto Institute of Technology) VLD2022-75 HWS2022-46
There has been a great deal of research into the development of domain-specific circuits for multiply-and-accumulate pro... [more] VLD2022-75 HWS2022-46
pp.13-18
SDM 2022-11-11
10:30
Online Online [Invited Talk] Implementation of Compact Model of a Metal Oxide Molecule Sensor for Self-Heating Control
Yohsuke Shiiki (Keio Univ.), Shintaro Nagata, Tsunaki Takahashi, Takeshi Yanagida (Univ. Tokyo), Hiroki Ishikuro (Keio Univ.) SDM2022-72
Metal oxide molecule sensor has notable advantages of low-cost fabrication and integration. However, the molecule sensor... [more] SDM2022-72
pp.40-43
SDM 2022-11-11
15:15
Online Online [Invited Talk] Reliable design of SiC Power Modules -- An Experimental Characterization for Aging Prediction --
Shuhei Fukunaga (Osaka Univ.), Alberto Castellazzi (KUAS), Tsuyoshi Funaki (Osaka Univ.) SDM2022-76
This research aims to develop the reliable design of multi-chip power modules with SiC MOSFETs for high-voltage power co... [more] SDM2022-76
pp.55-60
OCS, OPE, LQE 2021-10-22
16:30
Online Online Compact Model and Parametric Extraction for Optical Phase Shifters in Carrier-Depletion Mach-Zehnder Silicon Modulators
Tadashi Murao, Jun Ushida, Hiroyuki Takahashi, Masatoshi Tokushima, Akemi Shiina, Tsuyoshi Horikawa (PETRA) OCS2021-18 OPE2021-38 LQE2021-17
Testing processes in silicon photonics are totally different from electronics and reduction of testing time has been an ... [more] OCS2021-18 OPE2021-38 LQE2021-17
pp.27-32
CPSY, DC, IPSJ-ARC [detail] 2020-07-31
15:45
Online Online A Multiple Target Test Generation Method for Gate-Exhaustive Faults to Reduce the number of Test Patterns
Ryuki Asami, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.) CPSY2020-12 DC2020-12
In recent years, as the high density and complexity of integrated circuits have increased, defects in cells have increas... [more] CPSY2020-12 DC2020-12
pp.75-80
SDM 2019-11-07
15:20
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Compact Modeling Perspective -- Bridge to Industrial Applications --
Mitiko Miura-Mattausch (HU) SDM2019-72
This paper gives an overview about compact-model development history, which is undertaking the evolution as a bridge bet... [more] SDM2019-72
pp.17-20
HWS, VLD 2019-02-28
15:20
Okinawa Okinawa Ken Seinen Kaikan A SPICE Model Parameter Extraction Environment Using Automatic Differentiation
Aoi Ueda (NNCT), Michihiro Shintani (NAIST), Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT), Michiko Inoue (NAIST) VLD2018-117 HWS2018-80
Accuracy of circuit simulation highly relys on two techniques: compact modeling and parameter extraction. As increasing ... [more] VLD2018-117 HWS2018-80
pp.145-150
MBE 2019-01-31
10:00
Saga Saga University Development of a System for Visual Image Reconstruction by Decoding Brain State Using a Compact EEG Recorder
Aina Arai, Ryota Horie (SIT) MBE2018-57
In this study, we proposed a method to reconstruct images from EEG signals measured from a subject who looked at the im... [more] MBE2018-57
pp.1-4
EA, SP, SIP 2016-03-29
09:00
Oita Beppu International Convention Center B-ConPlaza [Poster Presentation] Study on Realization of Design Support Method for Compact Acoustic Systems
Hayato Takimoto, Yoshinobu Kajikawa (Kansai Univ.), Takashi Miyakura (HOSIDEN) EA2015-110 SIP2015-159 SP2015-138
In this paper, we study a realization of the design support method for compact acoustic systems.
Recently, the demand ... [more]
EA2015-110 SIP2015-159 SP2015-138
pp.243-248
US, EA
(Joint)
2015-01-29
09:25
Kyoto Doshisha Univ. Elastic FDTD Method Considering Viscous Effect for Compact Acoustic Systems
Tatsuya Tanada, Masahiro Toyoda, Yoshinobu Kajikawa (Kansai Univ.) EA2014-62
In this paper, we propose a finite difference time
domain (FDTD) method considering the elastic wave to analyze
the co... [more]
EA2014-62
pp.17-20
CPSY, DC
(Joint)
2014-07-29
15:40
Niigata Toki Messe, Niigata Evaluation of Large-scale Graph Rewriting Model Checking Using Hash Compaction
Taketo Yoshida, Masaru Onuma, Kazunori Ueda (Waseda Univ.) DC2014-19
Graph rewriting model checking is a verification method that determines whether a model described in a graph rewriting s... [more] DC2014-19
pp.9-16
SDM 2013-11-15
10:25
Tokyo Kikai-Shinko-Kaikan Bldg. Analytic Compact Model of Ballistic and Quasi-ballistic Cylindrical Gate-All-Around MOSFET Incorporating Drain-Induced Barrier Lowering Effect
He Cheng (Nagoya Univ.), Shigeyasu Uno (Ritsumeikan Univ.), Kazuo Nakazato (Nagoya Univ.) SDM2013-107
We propose an analytic compact model for ballistic and quasi-ballistic GAA-MOSFET with cylindrical cross section incorpo... [more] SDM2013-107
pp.43-48
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2012-11-28
16:25
Fukuoka Centennial Hall Kyushu University School of Medicine A Study on Test Generation for Effective Test Compaction
Yukino Kusuyama, Tatuya Yamazaki, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyusyu Univ.), Koji Yamazaki (Meiji Univ.) VLD2012-105 DC2012-71
In recent year, the numbers of target fault models and faults for testing increase because the number of gates on VLSIs ... [more] VLD2012-105 DC2012-71
pp.267-272
SDM 2012-11-15
10:55
Tokyo Kikai-Shinko-Kaikan Bldg [Invited Talk] 2012 SISPAD Paper Review -- Compact Model, Device Variability, Device Reliability --
Takahiro Iizuka (Hiroshima Univ.) SDM2012-99
Briefly reviewed are papers presented at 2012 SISPAD, particularly focused on compact model, device variability, and dev... [more] SDM2012-99
pp.5-7
SDM 2012-11-16
14:15
Tokyo Kikai-Shinko-Kaikan Bldg Nonlocal band to band tunneling model for tunnel-FETs -- Device and circuit models --
Koichi Fukuda, Takahiro Mori, Wataru Mizubayashi, Yukinori Morita, Akihito Tanabe, Meishoku Masahara, Tetsuji Yasuda, Shinji Migita, Hiroyuki Ota (AIST) SDM2012-111
Device and compact models for tunnel-FETs are developed based on nonlocal band to band tunneling model. For device model... [more] SDM2012-111
pp.63-68
SDM 2012-11-16
14:55
Tokyo Kikai-Shinko-Kaikan Bldg ANALYTIC COMPACT MODEL of BALLISTIC and QUASI-BALLISTIC CYLINDRICAL GATE-ALL-AROUND MOSFET INCLUDING TWO SUBBANDS for CIRCUIT SIMULATION
He Cheng (Nagoya Univ.), Shigeyasu Uno (Ritsumeikan Univ.), Tatsuhiro Numata, Kazuo Nakazato (Nagoya Univ.) SDM2012-112
We propose an analytic compact model for quasi-ballistic GAA-MOSFET with cylindrical cross section by using perturbation... [more] SDM2012-112
pp.69-73
EMCJ 2011-01-28
14:35
Kumamoto Kumamoto National College of Technology Application of Pyramidal Foam Absorber for Compact Anechoic Chamber above 1 GHz -- Relation between Site VSWR and Time Domain Evaluation --
Masato Kawabata (Fukuoka Industrial Technology Center), Hiroshi Onomae (Kagoshima Prefectural Institute of Industrial Technology), Masakatsu Fujimoto (Yamaguchi Prefectural Industrial Technology Institute), Kenji Ishimatsu (Kumamoto Industrial Research Institute), Yasuhiro Ishida (Fukuoka Industrial Technology Center) EMCJ2010-113
EMI test sites above 1 GHz are modeled as a free space. CISPR has specified the site voltage standing wave ratio (site V... [more] EMCJ2010-113
pp.79-84
SDM 2010-11-12
14:15
Tokyo Kikai-Shinko-Kaikan Bldg. Modeling of 2D Bias Control in Overlap Region of High-Voltage MOSFETs
Akihiro Tanaka, Yasunori Oritsuki, Hideyuki Kikuchihara, Masataka Miyake, Hans Juergen Mattausch, Mitiko Miura-Mattausch (Hiroshima Univ.), Yong Liu, Keith Green (TI) SDM2010-181
High-voltage MOSFETs have been applied in a wide range of bias voltages from a few volts up to several hundred volts by ... [more] SDM2010-181
pp.53-57
SDM 2010-11-12
14:40
Tokyo Kikai-Shinko-Kaikan Bldg. Proposal of a Fitting Accuracy Metric suitable for Compact Model Qualification in all MOSFET Operation Region
Hironori Sakamoto, Takahiro Iizuka (Renesas Electronics) SDM2010-182
Proposed is a fitting accuracy metric suitable for compact model qualification in all MOSFET operation regions. Fitting ... [more] SDM2010-182
pp.59-64
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