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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 44  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
SIS 2023-12-07
11:00
Aichi Sakurayama Campus, Nagoya City University
(Primary: On-site, Secondary: Online)
Data Path Parallelization to Improve Performance of High-level Synthesized Sprite Drawing Hardware
Yuka Otani, Akira Yamawaki (Kyutech) SIS2023-24
A mobile terminal architecture which can dynamically reconfigure the optimal hardware for each application can achieve h... [more] SIS2023-24
pp.1-6
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2023-11-16
14:10
Kumamoto Civic Auditorium Sears Home Yume Hall
(Primary: On-site, Secondary: Online)
Hardware obfuscation method using Obfuscator-LLVM and Bambu
Mikiya Ogura, Shuichi Ichikawa (Toyohashi Univ. Tech.) VLD2023-54 ICD2023-62 DC2023-61 RECONF2023-57
Hardware obfuscation serves as a countermeasure against hardware reverse engineering. Yamada et al. employed the OLLVM s... [more] VLD2023-54 ICD2023-62 DC2023-61 RECONF2023-57
pp.125-130
RECONF 2023-09-15
13:50
Tokyo Tokyo University of Agriculture and Technology Koganei campus
(Primary: On-site, Secondary: Online)
Abstraction of Processor-FPGA Communication in Reconfigurable Virtual Accelerator (ReVA)
Eriko Maeda, Kazuki Yaguchi, Shunya Kawai, Daichi Teruya (TUAT), Yasunori Osana (Kumamoto Univ.), Takehumi Miyoshi (Wasalabo), Hironori Nakajo (TUAT) RECONF2023-30
In recent years, hardware acceleration for HPC and AI has become a challenge due to the lack of resources and the comple... [more] RECONF2023-30
pp.46-51
MSS, CAS, SIP, VLD 2023-07-06
10:10
Hokkaido
(Primary: On-site, Secondary: Online)
Performance Improvement by Memory access and Process-level Pipelining for High-level Synthesized Sprite Drawing Hardware
Yuka Otani, Akira Yamawaki (Kyutech) CAS2023-3 VLD2023-3 SIP2023-19 MSS2023-3
A mobile terminal with hardware reconfigurability can achieve higher performance and lower power consumption by performi... [more] CAS2023-3 VLD2023-3 SIP2023-19 MSS2023-3
pp.10-15
LOIS 2023-03-14
11:40
Okinawa
(Primary: On-site, Secondary: Online)
Conversion from on-premise servers to cloud computing for a video-management system of a Moodle video-streaming system
Koji Tanaka, Yasuhiko Higaki (Chiba Univ.) LOIS2022-63
Chiba University has defined the requirements for online classes and created a video management system to fulfill them. ... [more] LOIS2022-63
pp.114-119
IPSJ-SLDM, RECONF, VLD [detail] 2023-01-23
10:55
Kanagawa Raiosha, Hiyoshi Campus, Keio University
(Primary: On-site, Secondary: Online)
Partitioning and Distributing Circuit Using HLS Split Compilation Tool for Reconfigurable Virtual Accelerator (ReVA)
Kazuki Yaguchi, Eriko Maeda, Daichi Teruya (TUAT), Yasunori Osana (Univ. of the Ryukyus), Takefumi Miyoshi (WasaLabo), Hironori Nakajo (TUAT) VLD2022-57 RECONF2022-80
Currently, hardware acceleration with FPGAs is often used for accelerating computational processes in fields such as art... [more] VLD2022-57 RECONF2022-80
pp.7-12
SANE 2022-11-10
13:50
Chiba Chiba Univ. (Nishi-Chiba Campus)
(Primary: On-site, Secondary: Online)
Development of CP-SAR image processing system using high-level synthesis
Takumi Aoyama, Kazuteru Namba, Josaphat Tetuko Sri Sumantyo (Chiba Univ.) SANE2022-56
(To be available after the conference date) [more] SANE2022-56
pp.35-38
IT, ISEC, RCC, WBS 2022-03-11
14:05
Online Online Achievable rate of multi-letter Ahlswede-Han scheme for modulo-sum problem
Takuto Kakishima, Shun Watanabe (TUAT) IT2021-120 ISEC2021-85 WBS2021-88 RCC2021-95
The achievable sum-rate of modulo-sum problem for two sources according to i.i.d. is investigated. We calculate the sum-... [more] IT2021-120 ISEC2021-85 WBS2021-88 RCC2021-95
pp.221-226
IE, ITS, ITE-AIT, ITE-ME, ITE-MMS [detail] 2022-02-22
14:25
Online Online Development of a Real Camera System with High-Level Synthesis Hardware of Median-Based Dynamic Background Subtraction
Kohei Shinyamada, Akira Yamawaki (Kyutech) ITS2021-61 IE2021-70
In this study, we developed a median-based dynamic background subtraction image processing system equipped with a real c... [more] ITS2021-61 IE2021-70
pp.214-218
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] 2022-01-25
10:45
Online Online An Implementation of a Real-time Stereo Matching System on FPGA
Kaijie Wei (Keio Univ.), Yuki Kuno (Marelli Corp.), Masatoshi Arai (Saitama Univ.), Hideharu Amano (Keio Univ.) VLD2021-65 CPSY2021-34 RECONF2021-73
To make full use of stereo data in autonomous driving system, the techniques to generate depth-map in real-time are nece... [more] VLD2021-65 CPSY2021-34 RECONF2021-73
pp.90-95
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] 2022-01-25
15:35
Online Online Preliminary evaluation of cache coherent interconnect for Reconfigurable Virtual Accelerator (ReVA)
Eriko Maeda, Daichi Teruya, Hironori Nakajo (TUAT) VLD2021-72 CPSY2021-41 RECONF2021-80
In recent years, the amount of computation and data in HPC, AI, and other computational processing has become increasing... [more] VLD2021-72 CPSY2021-41 RECONF2021-80
pp.132-137
SANE 2021-12-16
14:55
Chiba Chiba University
(Primary: On-site, Secondary: Online)
Comparison of HLS and IP core for CP-SAR images processing onboard UAV
Yuta Tanaka, Takumi Aoyama, Kazuteru Namba, Josaphat Tetuko Sri Sumantyo (Chiba Univ) SANE2021-76
(To be available after the conference date) [more] SANE2021-76
pp.75-78
RECONF 2021-09-10
09:55
Online Online An FPGA Implementation of neural networks with multi-core structured using high level synthesis
Akira Jinguji, Hiroki Nakahara (Tokyo Tech) RECONF2021-18
(To be available after the conference date) [more] RECONF2021-18
pp.7-12
ITE-ME, EMM, IE, LOIS, IEE-CMN, IPSJ-AVM [detail] 2021-08-26
16:50
Online Online [Invited Talk] On-demand video delivery system for Moodle
Yasuhiko Higaki, Kenich Shimizu, Shigeo Fujimoto, Yohei Matsumoto (Chiba Univ.) LOIS2021-23 IE2021-18 EMM2021-53
Moodle, which is used as an LMS in many universities, does not have a fully functional and highly scalable mechanism for... [more] LOIS2021-23 IE2021-18 EMM2021-53
pp.38-43
EMM, IT 2021-05-20
13:25
Online Online The Achievable Rate Region of Wyner-Ahlswede-Korner Coding Problem for Mixed Sources
Daisuke Takeuchi, Shun Watanabe (TUAT) IT2021-2 EMM2021-2
The achievable rate region of Wyner-Ahlswede-Körner coding problem for mixed sources is investigated.Wyner-Ahlswede-Körn... [more] IT2021-2 EMM2021-2
pp.7-12
LOIS 2021-03-04
14:15
Online Online Verification of delivery performance of the on-demand video delivery system
Kenichi Shimizu, Yasuhiko Higaki, Shigeo Fujimoto, Yasuo Sugai (Chiba Univ.) LOIS2020-50
The on-demand class video delivery system developed by the authors has
achieved stable operation without any major syst... [more]
LOIS2020-50
pp.18-23
LOIS, EMM, IE, IEE-CMN, ITE-ME, IPSJ-AVM [detail] 2020-09-01
16:55
Online Online Design of e-learining oriented video streaming system
Kenichi Shimizu, Yasuhiko Higaki, Shigeo Fujimoto, Yasuo Sugai (Chiba Univ.) LOIS2020-7 IE2020-19 EMM2020-31
A practical on-demand video delivery system on Moodle was designed and developed for e-learning system for Chiba Univers... [more] LOIS2020-7 IE2020-19 EMM2020-31
pp.13-18
LOIS, IPSJ-DC 2020-07-10
14:35
Online Online Video delivery for media class -- Emergency response to COVID-19 --
Yasuhiko Higaki, Shigeo Fujimoto, Koichi Takase, Yaeko Takeuchi, Yohei Matsumoto, Akiko Ikeda (Chiba Univ.), Kenichi Shimizu (Blue Link Systems), Satoshi Okada (Chiba Univ.) LOIS2020-3
Chiba University has been preparing for the introduction of media-facilitated classes in 2020, but its role has changed ... [more] LOIS2020-3
pp.1-6
LOIS 2020-03-11
16:05
Okinawa Nobumoto Ohama Memorial Hall
(Cancelled but technical report was issued)
A study of a video distribution system suitable for media classes
Akinari Harada, Depeng Zhang, Yasuhiko Higaki (Chiba Univ.) LOIS2019-67
We studied a video distribution method and its parameters that are suitable for distributing videos of teaching material... [more] LOIS2019-67
pp.63-67
ICTSSL, CAS 2020-01-30
18:00
Tokyo   High-level synthesis oriented histogram series duplication for overlapping continuous image processing
Moena Yamasaki, Akira Yamawaki (Kyutech) CAS2019-80 ICTSSL2019-49
In order to quickly realize a high-performance and power-saving embedded image processing device, it is effective to use... [more] CAS2019-80 ICTSSL2019-49
pp.85-89
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