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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] | 2014-03-16 10:50 |
Okinawa | HPC interconnect for high topological embeddability by supplementary optical circuit switches Ryuta Kawano (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII)  CPSY2013-111 DC2013-98 |
Our goal is to run multiple parallel applications that have various communication patterns among participating processes... [more] | CPSY2013-111 DC2013-98 pp.253-258 |
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| IPSJ-SLDM, CPSY, RECONF, VLD [detail] | 2014-01-28 08:30 |
Kanagawa | Hiyoshi Campus, Keio University | Design and implementation of high-level synthesis compiler for stream computation Ryo Ito, Hayato Suzuki, Ryotaro Chiba, Kentaro Sano, Satoru Yamamoto (Tohoku Univ.) VLD2013-102 CPSY2013-73 RECONF2013-56 |
High-level synthesis (HLS) has been getting more and more important as FPGAs are more widely used for various applicati... [more] |
VLD2013-102 CPSY2013-73 RECONF2013-56 pp.1-6 |
| CPSY, VLD, RECONF, IPSJ-SLDM [detail] | 2013-01-17 11:25 |
Kanagawa | Low latency network topology using multiple links at each host Ryuta Kawano (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII) VLD2012-128 CPSY2012-77 RECONF2012-82 |
End-to-end network latency has become an important issue for parallel application on large-scale High Performance Comput... [more] | VLD2012-128 CPSY2012-77 RECONF2012-82 pp.123-128 |
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| CPSY, VLD, RECONF, IPSJ-SLDM [detail] | 2013-01-17 14:25 |
Kanagawa | Implementation of a pupil detection method using an FPGA accelerator and a high-level synthesis tool Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2012-132 CPSY2012-81 RECONF2012-86 |
In this paper, we describe an implementation of a pupil detection using MaxCompiler which is a high-level synthesis fram... [more] | VLD2012-132 CPSY2012-81 RECONF2012-86 pp.147-152 |
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| RECONF | 2012-09-19 11:05 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | Prototyping Tightly-Coupled FPGA Cluster for Lattice Boltzmann Computation Kentaro Sano, Yoshiaki Kono, Hayato Suzuki, Ryotaro Chiba, Satoru Yamamoto (Tohoku Univ.) RECONF2012-40 |
This paper presents a prototype of a tightly-coupled FPGA cluster for LBM computation, which is one of the computing met... [more] | RECONF2012-40 pp.95-100 |
| DC, CPSY (Joint) |
2012-08-03 14:30 |
Tottori | Torigin Bunka Kaikan | Rack Layout Optimization for Random Network Topology Ikki Fujiwara, Michihiro Koibuchi (NII) CPSY2012-25 |
As the scale of many-core parallel applications and supercomputer systems increases, the negative impact of communicatio... [more] | CPSY2012-25 pp.97-102 |
| CPSY | 2011-10-21 13:00 |
Hyogo | [Invited Talk]
The semiconductor, system and software technologies which made K computer the world fastest computer Yoshihiro Kusano, Koichi Hirai (FUJITSU) CPSY2011-31 |
The K computer which has been developed by RIKEN and Fujitsu have taken first place on LINPACK benchmark TOP500 list on ... [more] | CPSY2011-31 pp.37-39 |
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| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2011-03-19 13:15 |
Okinawa | Performance Evaluation of High Performance Linpack on a Cell/B.E. Cluster with Heterogeneous Interconnect Ryota Nishida, Tetsuya Nakahama, Toshiaki Kamata, Yuri Nishikawa, Hideharu Amano (Keio Univ.) CPSY2010-77 DC2010-76 |
While the performance of node processors in High Performance Computing Clusters (HPCCs) are growing, an interconnection ... [more] | CPSY2010-77 DC2010-76 pp.267-272 |
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| VLD | 2010-03-12 14:35 |
Okinawa | Design and Implementation of an AMBA AHB Compliant Bus Architecture on FPGA Xuan-Tu Tran, Hai-Phong Phan, Van-Huan Tran, Quang-Vinh Tran, Ngoc-Binh Nguyen (Vietnam National Univ.) VLD2009-127 |
To meet the increasing demands of recent applications, systems-on-chips (SoCs) are more and more complex and one system ... [more] | VLD2009-127 pp.169-174 |
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| IPSJ-SLDM, VLD, CPSY, RECONF [detail] | 2010-01-27 10:50 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Hardware Acceleration in a Scalable FPGA System Hironori Nakajo, Ryuichi Sakamoto (Tokyo Univ. of Agr and Tech.) VLD2009-88 CPSY2009-70 RECONF2009-73 |
Currently, FPGAs are utilized for hardware experiments or practices in many educational institutes. In a field of high ... [more] |
VLD2009-88 CPSY2009-70 RECONF2009-73 pp.119-124 |
| ISEC | 2009-09-25 10:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A Study on Higher Order Difference Operation for Calculating a Large Number of Elliptic Curve Scalar Multiples Tomoko K. Matsushima, Yoshitaka Sagara, Nobuhide Sakuragi (Polytechnic Univ.), Osamu Ashihara ISEC2009-40 |
Efficient elliptic curve arithmetic is crucial for cryptosystems based on elliptic curves. Such cryptosystems often requ... [more] | ISEC2009-40 pp.1-8 |
| IN | 2009-07-09 16:15 |
Hokkaido | HOKKAIDO UNIVERSITY | [Invited Talk]
High-performance, High-efficient Security Processing Satoshi Kamiya (NEC) IN2009-29 |
With the Internet growth and progress of Cloud Computing, circumstances using computer resources via network is getting ... [more] | IN2009-29 pp.25-30 |
| OPE, EMT, MW | 2008-07-24 14:50 |
Hokkaido | Interlocking Operation of FDTD/FIT Dedicated Computer PCB with Host PC Yuya Fujita, Hideki Kawaguchi (Muroran IT) MW2008-66 OPE2008-49 |
Authors had been working in development of a dedicated computer for FDTD/FIT method to enhance ordinary personal compute... [more] | MW2008-66 OPE2008-49 pp.109-112 |
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| EMT, OPE, MW | 2007-08-02 09:00 |
Hokkaido | Muroran Institute of Technology | Higer Performace Architecture of FDTD/FIT Memory Machine Yoshiyuki Fujishima, Yuya Fujita, Hideki Kawaguchi (Muroran IT), Shun-suke Matsuoka (Asahikawa NCT) MW2007-42 OPE2007-29 |
To achieve efficient design environment of electrical products based on microwave technologies, the authors have been wo... [more] | MW2007-42 OPE2007-29 pp.1-6 |
| IN, ICM, LOIS (Joint) |
2006-01-19 13:30 |
Kyoto | Kyoto Univ. | NE Configuration Data Auto-generation Method for a Distributed Data Driven Architecture Hikaru Takei, Atsushi Kato, Kazuhide Takahashi, Makoto Koshiro (DoCoMo) |
According to HPCC (High Performance Computing Cluster), high performance can be achieved. HPCC also enables drastic redu... [more] | TM2005-43 pp.7-12 |
| RECONF | 2005-05-13 09:00 |
Kyoto | Kyoto University | Development of a testbed RCPII to evaluate effects of a real environment for a reconfigurable computing Kosei Shimoo, Akira Yamawaki, Masahiko Iwane (KIT) |
To familiarize reconfigurable computing, it is important to improve system using the result of evaluating including beha... [more] | RECONF2005-15 pp.1-5 |
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