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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
NLP 2017-05-11
16:25
Okayama Okayama University of Science I-PD Controller Design Using Particle Swarm Optimizer -- Settling Time Minimization Under Constraint of the Gain Crossover Frequency --
Yuzo Ohta (Kobe Univ.) NLP2017-14
In this paper, we consider the parameter tuning of I-PD controller which achieves minimum settling time control under th... [more] NLP2017-14
pp.69-72
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-07
08:55
Kagoshima   Improvements and evaluation of bias circuit control for CMOS analog circuit
Ryohei Hori (Ritsumeikan Univ.), Toshio Kumamoto (OSU), Masayoshi Shirahata, Takeshi Fujino (Ritsumeikan Univ.) CPSY2014-175 DC2014-101
The power control using Noff (Normally-off) scheme for realization low power sensor node device is gathering a lot of at... [more] CPSY2014-175 DC2014-101
pp.77-82
NLP 2015-03-03
16:00
Hyogo Hyogo Prefecture Citizens' Hall a% Setteling Time Control of Nonlinear Uncertain Discrete Time Systems
Yuzo Ohta (Kobe Univ.), Yu-chuan Tong (Ishida), Izumi Masubuchi (Kobe Univ.) NLP2014-149
In this paper, we study robust a% settling time control of nonlinear uncertain discrete time systems. ``Robust a% settli... [more] NLP2014-149
pp.33-38
NLP 2014-11-06
17:20
Niigata TsubameSanjo Regional Industries Promotion Center Robust a% Setteling Time Control
Yuzo Ohta (Kobe Univ.), Yu-chuan Tong (Ishida), Izumi Masubuchi (Kobe Univ.) NLP2014-89
Dead beat control is not possible for uncertain systems. In the practical point view, it is enough to achieve finite tim... [more] NLP2014-89
pp.45-49
CAS, NLP 2013-09-27
09:50
Gifu Satellite Campus, Gifu University A Method of Clock Synchronization for Power Packet Dispatching -- Parameters Optimization in Clock Synchronization --
Yanzi Zhou, Ryo Takahashi, Takashi Hikihara (Kyoto Univ.) CAS2013-46 NLP2013-58
This paper proposes a method of clock synchronization for power packet dispatching. In a power packet dispatching system... [more] CAS2013-46 NLP2013-58
pp.57-62
ICD, ITE-IST 2010-07-23
09:40
Osaka Josho Gakuen Osaka Center OTA Design Using gm/ID Lookup Table Methodology -- Design optimization featuring settling time analysis --
Toru Kashimura, Takayuki Konishi, Shoichi Masui (Tohoku Univ.) ICD2010-31
Settling time is a primary design parameter in operational transconductance amplifiers (OTAs) used for high-speed applic... [more] ICD2010-31
pp.61-66
 Results 1 - 6 of 6  /   
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