|
|
All Technical Committee Conferences (Searched in: All Years)
|
|
Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
|
Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
CAS, MSS, IPSJ-AL [detail] |
2017-11-17 13:50 |
Tokyo |
|
Dynamic Compact Routing Tolerating Node Faults Yuki Takahashi, Toshinori Yamada (Saitama Univ.) CAS2017-56 MSS2017-40 |
Recently, a wireless ad hoc network(WANET) have drawn much attention, which consists only of wireless mobile devices wit... [more] |
CAS2017-56 MSS2017-40 pp.111-116 |
R |
2010-07-30 13:40 |
Yamagata |
|
Dynamic Fault Tree Analysis by using Cut Sequence Sets Taijirou Yoneda, Tetsushi Yuge, Nobuyuki Tamura, Shigeru Yanagi (NDA) R2010-18 |
We propose a method of calculating the top event probability of a fault tree with priority AND gates using the minimal c... [more] |
R2010-18 pp.7-12 |
EMD, R |
2010-02-19 14:50 |
Osaka |
|
Cut Set Analysis of Fault Tree with Priority AND Gates Taijirou Yoneda, Tetsushi Yuge, Nobuyuki Tamura, Shigeru Yanagi (NDA) R2009-55 EMD2009-122 |
We propose a method for calculating the exact top event probability of a fault tree with priority AND gates using the mi... [more] |
R2009-55 EMD2009-122 pp.31-36 |
R |
2009-07-31 16:20 |
Hokkaido |
|
Top Event Probability of a Repairable Dynamic FT Tetsushi Yuge, Nobuyuki Tamura, Shigeru Yanagi (NDA) R2009-31 |
A priority AND gate is a representative logic gate of dynamic fault trees. This paper deals with a repairable dynamic FT... [more] |
R2009-31 pp.53-58 |
R |
2008-12-12 14:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Dynamic fault tree analysis of restorable systems using an idea of extended priority AND gates Nobuko Kosugi, Koichi Suyama (Tokyo Univ. Marine Sci. Tech.) R2008-42 |
The authors have presented an idea of extended priority AND gates with multiple output-occurrence states for an improved... [more] |
R2008-42 pp.17-24 |
R |
2007-10-19 13:25 |
Fukuoka |
Kyushu University |
Steady state probability of a priority AND gate considering the restoration of input events Shinya Ozeki, Tetsushi Yuge, Nobuyuki Tamura, Shigeru Yanagi (N.D.A) R2007-38 |
A priority AND gate is a representative logic gate of dynamic fault trees. In this report, we analyze the steady state p... [more] |
R2007-38 pp.7-12 |
|
|
|
Copyright and reproduction :
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
|
[Return to Top Page]
[Return to IEICE Web Page]
|