Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SS, MSS |
2014-01-31 09:55 |
Aichi |
|
Bounded model checking based in SMT for CISC embedded assembly programs Atsushi Takeshita, Junpei Kobashi, Satoshi Yamane (Kanazawa Univ.) MSS2013-62 SS2013-59 |
In this paper,we describe the method of verification by bounded model checking based in SMT using Code Block for embedde... [more] |
MSS2013-62 SS2013-59 pp.65-70 |
SS, IPSJ-SE |
2013-10-24 10:30 |
Ishikawa |
|
Symbolic Model Checking of Embedded CISC Assembly Program Kenta Watanabe, Hyejin Jang, Kohei Sakurai, Satoshi Yamane (Kanazawa Univ.) SS2013-36 |
The more complicated embedded systems are, the more difficult verification of safety and reliability is.
Therefore, the... [more] |
SS2013-36 pp.1-5 |
MSS |
2013-01-23 15:20 |
Osaka |
Osaka Int. Convention Center |
A Proposal of Similarity Evaluation for Ordered Trees
-- Application to Similarity Verification of C Language Programs -- Huricha Bao, Mitsuru Nakata, Qi-Wei Ge (Yamaguchi Univ.) MSS2012-56 |
In this paper,we deal with evaluation method of similarity of two given ordered trees. A similarity computation techniqu... [more] |
MSS2012-56 pp.61-64 |
KBSE |
2012-11-22 11:25 |
Ishikawa |
Kanazawa University |
SMT-based Bounded Model Checking for Assembly program Junpei Kobashi, Atsushi Takeshita, Satoshi Yamane (Kanazawa Univ.) KBSE2012-41 |
In this paper, we state property verification by Bounded Model Checking using SMT solver for register level model of ass... [more] |
KBSE2012-41 pp.19-24 |
VLD, CAS, MSS, SIP |
2012-07-02 13:00 |
Kyoto |
Kyoto Research Park |
Verification of embedded software in Assembly code by SMT prover Atsushi Takeshita, Junpei Kobashi, Satoshi Yamane (Kanazawa Univ.) CAS2012-7 VLD2012-17 SIP2012-39 MSS2012-7 |
We propose the technique of Bounded Model Checking(BMC) for embedded assembly program. We use SMT solver for BMC. We als... [more] |
CAS2012-7 VLD2012-17 SIP2012-39 MSS2012-7 pp.37-42 |
IPSJ-SLDM, VLD |
2012-05-30 15:45 |
Fukuoka |
Kitakyushu International Conference Center |
High-level Design Debugging Using Potential Dependence Shohei Ono, Takeshi Matsumoto, Masahiro Fujita (Univ. of Tokyo) VLD2012-4 |
As high-level design draws more attention and has been adopted more widely, verification and debugging for high- level d... [more] |
VLD2012-4 pp.19-24 |
SS, MSS |
2012-01-26 14:15 |
Kochi |
Kochi City Culture-Plaza Cul-Port |
Automatic Generation of Non-linear Loop Invariants for Programs with Function Calls Eiichi Suzuki, Toshiki Sakabe, Masahiko Sakai, Keiichirou Kusakari, Naoki Nishida (Nagoya Univ.) MSS2011-61 SS2011-46 |
Finding loop invariants is one of the most important tasks in program verification. It is, however, difficult to automat... [more] |
MSS2011-61 SS2011-46 pp.39-44 |
SS |
2011-03-08 09:25 |
Okinawa |
Okinawa-ken Seinen Kaikan |
Towards Verifying Pointer-Manipulating Program using Program Transformation
-- A Case Study with Morris' Binary Tree Traversal Algorithm -- Takuo Watanabe, Sosuke Moriguchi, Kazuhiro Yamada, Shin-ya Nishizaki (Tokyo Tech) SS2010-69 |
We proved the correctness of a C implementation of Morris's tree traversal algorithm.
The algorithm is known as a recur... [more] |
SS2010-69 pp.97-102 |
MSS |
2011-01-21 11:20 |
Yamaguchi |
Kaikyo-Messe-Shimonoseki |
Similarity Verification of C Language Program by Using Similarity Degree of Syntax Tree Bou konisa, Tsuyoshi Morita, Qi-Wei Ge, Mitsuru Nakata (Yamaguchi University) CST2010-74 |
In this paper,we propose a method of verifying similarity of C language programs by using similarity degree of syntax tr... [more] |
CST2010-74 pp.83-86 |
ET |
2010-11-26 14:20 |
Tokyo |
Tokyo Institute of Technology |
A method for evaluating examination papers by chunking and slicing in assembly programming exercise Yuichiro Tateiwa (NIT), Hirokazu Yoshida (Panasonic Advanced Technology Development), Daisuke Yamamoto, Naohisa Takahashi (NIT) ET2010-58 |
We had developed a mechanism for automatically detecting program bugs of examination papers in assembly programming exer... [more] |
ET2010-58 pp.53-58 |
SWIM |
2010-11-19 11:30 |
Tokyo |
Tokai Univ. Takanawa Campus(Tokyo) |
A Proposal of Realizing High Degree Security in Cloud Computing Environment
-- Concealing Data and Programs in Cloud Computing Environments -- Yohtaro Miyanishi (ISEM) SWIM2010-18 |
We suppose a case that an enterprise uses public cloud. In that case, the user wants to keep the secret of data and how ... [more] |
SWIM2010-18 pp.13-17 |
SS |
2010-10-15 11:00 |
Iwate |
Iwate Prefectural Univ. |
On DPLL Transition Systems Modulo Equational Theories Tatsuya Baba, Toshiki Sakabe, Naoki Nishida, Keiichirou Kusakari, Masahiko Sakai (Nagoya Univ.) SS2010-36 |
SMT solvers are tools for deciding satisfiability of formulas under given theories such as arrays, lists, queues and so ... [more] |
SS2010-36 pp.49-54 |
MSS, CAS |
2009-11-26 11:35 |
Aichi |
Nagoya University |
Advanced Technologies for Dependable Systems through Product Lifecycle by Managing Gaps among their Specification, Implementation, and Environment. Naoshi Uchihira (Toshiba) CAS2009-46 CST2009-19 |
Increasingly large, complex, open, and cooperative products and systems requires new approaches to establish high depend... [more] |
CAS2009-46 CST2009-19 pp.7-12 |
ET |
2009-06-13 13:35 |
Aichi |
Nanzan Univ. |
A Proposal of an Educational-support System for Java Programming Using the Test-driven Development Method Yukiko Matsushima, Yasuhiro Kasai, Nobuo Funabiki, Toru Nakanishi, Noriki Amano (Okayama Univ.) ET2009-8 |
This paper presents an educational-support system for Java programming using the test-driven development method, with th... [more] |
ET2009-8 pp.7-12 |
VLD |
2009-03-12 10:30 |
Okinawa |
|
A Formal Verification Method for On-Chip Programmable Interconnect Takaaki Tagawa, Hiroaki Yoshida, Masahiro Fujita (Univ. of Tokyo) VLD2008-142 |
As the development cost increases, programmable devices such as FPGAs are becoming critically important. A key componen... [more] |
VLD2008-142 pp.95-100 |
ET |
2008-06-14 13:30 |
Aichi |
|
Development of a Function to Exchange Programming Projects using Tangible Media among Students for Primary Education Tadayuki Otowa, Hideyuki Takada (Ritsumeikan Univ.) ET2008-9 |
In these days, some primary schools have programming classes such as Squeak eToys to acquire logical thinking ability an... [more] |
ET2008-9 pp.21-26 |
KBSE, SS |
2008-05-29 13:30 |
Miyazaki |
Miyazaki Citizens' Plaza |
On Rewriting Induction for Presburger-Constrained Term Rewriting Systems Tsubasa Sakata, Naoki Nishida, Toshiki Sakabe, Masahiko Sakai, Keiichirou Kusakari (Nagoya Univ.) SS2008-1 KBSE2008-1 |
A method for verifying equivalence between procedural programs has been proposed, where the implicit induction is extend... [more] |
SS2008-1 KBSE2008-1 pp.1-6 |
MSS |
2008-01-29 14:45 |
Tokushima |
The University of Tokushima |
On Verification of Marking-Dependent Terminacy for SWITCH-Less Program Nets Keisuke Komiya, Shingo Yamaguchi, Qi-Wei Ge, Minoru Tanaka (Yamaguchi Univ.) CST2007-55 |
In this paper, we discuss terminacy at the initial token distribution for (dataflow) program nets.
Ge et al. have propo... [more] |
CST2007-55 pp.53-58 |
PRMU |
2007-12-14 10:00 |
Hyogo |
Kobe Univ. |
Visual-based Verification by Signature Tracking
-- Tracking the pen tip by Sequential Monte Carlo -- Kumiko Yasuda (Waseda Univ.), Daigo Muramatsu (Seikei Univ.), Atsushi Matsui (STRL NHK), Takashi Matsumoto (Waseda Univ.) PRMU2007-145 |
This paper proposes visual-based online signature verification by tracking the signer's pen tip. Input module of the sys... [more] |
PRMU2007-145 pp.53-58 |
SS, KBSE |
2006-10-26 13:40 |
Ehime |
Ehime University |
Approach to Software Verification Based on Transforming from Procedural Programs to Rewrite Systems Yuki Furuichi, Naoki Nishida, Masahiko Sakai, Keiichirou Kusakari, Toshiki Sakabe (Nagoya Univ.) |
In the field of term rewriting, inductionless induction and rewriting
induction have been widely studied as methods for... [more] |
SS2006-41 KBSE2006-17 pp.7-12 |